This invention relates to coin validators , and is particularly , but not exclusively , concerned with validators which use very little power , and which are therefore suitable for use in , for example , pay telephones .

British Patent Specification No . 2 , 093 , 620A describes a coin validator which provides very accurate and reliable results , and which consumes very little power . The present invention is concerned with further improvements in this field, directed to a large extent to reducing the cost of the apparatus without increasing the power consumptio . r It will be appreciated from the following that the invention has a number of aspects which can be used independently to advantage. Preferably, however, some or all of these aspects are combined to produce a low- cost, low-power validator. Some aspects of the invention are concerned with an arrival sensor, which is used to sense when a coin arrives at the validator so as to initiate the powering-up of parts of the validator circuitry which are normally, in order to conserve power, either switched off or running

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at a relatively low power level.

In accordance with one aspect of the invention, an inductive arrival sensor is also used in the testing of coins for providing a signal which is indicative predominantly of the diameter or surface area of the coin. Preferably, it is the frequency of the signal * which is used as an indication of diameter or surface area. In view of the relationship between diameter and surface area, the testing of either of these par - meters will be, for simplicity, referred to herein merely as diameter testing.

In another aspect of the invention, which is preferably combined with the previously-mentioned aspect, . the inductance of an arrival sensor which is used also for testing coins is confined to one side of the coin path. This differs from the arrangement described in the earlier Patent Specif cation mentioned above, in which the arrival sensor is used for measuring coin thickness, and comprises coils mounted on both sides of the coin path.

In a still further aspect of the invention, a sensor, preferably an arrival sensor, comprises an inductance coupled to an amplifier so as to produce an oscillator having a

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frequency dependent upon the value of the inductance, and thus varying in response to a coin coming into proximity to the inductance, wherein at least a substantial -part of the load of the -amplifier is independent of the presence of a coin. In a preferred embodiment, the oscillator is a Colpitt's circuit. Preferably, the output current of the amplifier is derived via a fixed impedance, preferably a resistor. The inductance is preferably coupled between the output and the input of the amplifier to produce feedback and cause oscillation.

The above features are intended to provide an arrival sensor which requires very little current in order to be able to detect the arrival of a coin, and preferably which also can carry out a testing operation while consuming only a small amount of current, and preferably without requiring the current used for arrival sensing to be increased as is done in the circuit described in the above-mentioned earlier Patent Specification.

By using the circuit described above, the signal from the arrival sensor, undergoes relatively little attenuation as a coin passes the coil. This means that

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the sensing circuit can be operated at low current ^* without risking disappearance of the signal upon arrival of a coin. Because it is the ^* , frequency of the signal which is used for detecting coin arrival, the relatively 5 small change in amplitude does not detrimentally affect •* ^■ the sensitivity of the circuit. In addition, it has been found that in using the coil for diameter measurement, and arranging for there to be a coil on only one side of the coin path, fairly good discrimination can be achieved 10 even with the sensing circuit operating at a low current. According to another aspect of the invention, a printed circuit is used to form an inductance used for testing coin properties. In a preferred embodiment, the printed circuit inductance is used for diameter easure- 15 ment and/όr arrival sensing, and indeed it may form the arrival sensor discussed above with reference to the preceding aspects of the invention. In an arrangement .using . a printed circuit inductance the dimensions of the inductance and its physical positioning with respect 20 to the coin path can be made much more consistent than with conventional coils. It will be appreciated for example that a conventional coil mounted adjacent a coin ^" p ^' -ith will provide different output measurements in dependence upon not only the precise positioning of the 25 core with respect to the flight path but also the

positions of the coil turns with respect to the core. In the case of a printed circuit inductance, it is very simple to form the printed circuit pattern at a very accurate position with respect to the support upon which it is formed. In the past, a technique used in making coin validators has involved varying the stored coin parameter values which are used in testing in accordance with the particular measure¬ ments produced by an individual validator so as to deal with slight variations between different validators; by using a printed circuit inductance this step can now, if desired, be omitted, thereby reducing the cost of manufacture.

The printed circuit inductance may be double sided using, for example, a double-sided through-hole plated printed circuit board. The inductances on both sides may be connected in a* configuration in which the fields they produce aid each other. According to a further aspect of the invention, a diameter-testing inductance, which preferably but not necessarily is formed of a printed circuit as set out above, has a height which is substantially equal to its width. The overall shape of the inductance may be substantially square, or preferably circular. Preferably, the lower edge of

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the inductance is at or slightly below the bottom of the surface on which the coin rests as it passes the inductance.

The maximum area of the inductance covered by a coin as it passes the inductance will depend on the coin diameter. Better discrimination can be achieved in this way, in which the area covered increases with the square of the diameter, than in an arrangement in which the inductance is elongate so that the length covered varies in proportion to the diameter.

According to another aspect of the invention, the determination of coin validity is carried out using a processor which has two states, in one of which the processor consumes a relatively large amount of current and carries out processing operations, and in the other of which processing operations are not carried out and a lower level of current is consumed. Preferably, the processor is caused to perform, in its first, active state, a validity checking operation in response to arrival of the coin as detected in response to an arrival sensor. Preferably, the processor is periodically caused to enter its first state in order to examine the output of the arrival sensor so as to detect coin arrival. ^' The processor is preferably a microprocessor.

SUBSTITUTE SHEET

In another aspect of the invention, the arrival of a coin is detected by performing, periodically,

- ^• a measurement using an arrival sensor, and determining that a coin has arrived if measurements produce values

5 which change in a predetermined manner. In a preferred embodiment, the last two measurements taken of the

^* > frequency of the output of the arrival sensor are considered, and if that frequency is found to have increased by more than a predetermined amount, it is

10 determined that a coin has arrived at the sensor. This determination' is made in response to measurements taken over a short period, and therefore the effects of drift caused by, e.g. temperature changes or aging of components, does not have any material effect upon the

15 detection of coin arrival.

The processor is preferably activated period¬ ically only, long enough to perform a measurement and determine whether a coin has arrived. The processor then returns to its second state, to reduce power 0 consumption, unless coin arrival is detected in which case a validation operation is performed.

Another aspect of the invention relates to the use of a processor having two states, as referred to above, and concerns the provision of a circuit for 5 automatically resetting the processor after the processor has ^* been caused to enter its active state unless the

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circuit is inhibited from doing so by the processor itself. Under normal circumstances the processor will inhibit the operation of the resetting circuit, but if the processor "hangs-up", i.e. ceases to operate properly, it will automatically be reset so that proper operation of the processor can be recommenced. The resetting circuitry can also be arranged to respond to other signals; for example, it can be responsive to an output of the processor and cause resetting if a signal at the output lasts for more than a .predetermined interval.

In a preferred embodiment, a counter is arranged to count, following the activation of the processor, and to cause resetting if a predetermined count is reached. Under normal circumstances the counter would be cleared by the processor before this predetermined count is reached. The counter may be that referred to above.

The output of the arrival coil can be measured by using a counter (possibly an internal counter of a _. microprocessor) which is caused to count the oscillations of the arrival sensing circuit for a predetermined period

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to produce a count representing frequency. This method can also be used during the validation operation to produce a measure of a parameter (preferably diameter) of the coin. In accordance with another aspect of the invention, a coin validator has two sensors, one of which is an arrival sensor and also acts for providing a measurement substantially dependent upon the diameter of a coin, and the other of which provides a measurement substantially dependent upon the material and/or thick¬ ness of the coin. In the case of the former sensor, preferably the frequency of the output is used for measuring purposes, and in the case of the latter sensor, preferably the attenuation of the output signal is used for measuring purposes.

In accordance with a still further aspect of the invention, the frequency and output of an inductive coin sensor are both used in determining the validity of a coin. Preferably the sensor comprises a coil at each side of a coin path. Preferably, the sensor produces an output predominantly dependent upon the material of the coin, and dependent also but to a lesser extent upon the thickness of the coin. Preferably the frequency and amplitude are measured alternately using the same circuitry. Preferably, the detected

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variation in amplitude is used to determine the time at which a frequency measurement is made.

In order to measure amplitude attenuation, the output of the sensor is preferably converted to a digital signal. In a particularly convenient embodiment of the invention, a counter is used in the analog/ digital conversion. The count output may be converted to an analog signal which is compared with that from the sensor. The counter is clocked until the analog signals are equal, at which point the count is a digital representation of the output of the sensor. Alternatively, the counter is used to measure the time taken for a voltage level to rise or fall to that of the analog voltage, being measured, the time taken being a digital representation of the analog voltage level. The counter may be that referred to above.

In accordance with a still further aspect of the invention, the attenuation of an output signal of a sensor used to check coin validity is repeatedly measured, successive measurements are compared to determine when the coin starts to leave the sensor, and a plurality of the measurements obtained before this time are averaged to obtain an attenuation measurement. Preferably, a predetermined number of measurements are stored, and when the latest measurements indicate that the coin is leaving

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the sensor, the first n of these measurements are averaged, where n is a predetermined value.

It will be appreciated that the validator circuit can use a counter for any or all of the following purposes:

(a) periodically activating a processor

(b) monitoring the frequency of one or more coin sensing circuits

(c) forming part of an analog/digital conversion circuit.

Another aspect of the invention is concerned with a validator having a counter which serves one or more, and preferably all, of the above functions. The use of a counter to perform several of these functions has the advantage that the cost and power consumption of the circuit are reduced.

In accordance with a yet further aspect of the invention, in a coin validator a coin is rejected in response to a determination that the coin is passing one or more sensors at a speed greater than

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a predetermined limit. This may be detected by measuring the interval between the coin passing two separate sensors and/or by measuring the rate of change of an output signal of a single sensor. Such an arrangement is particularly valuable in small coin validators where the distance between a coin entry slot and the coin sensors is short and therefore there is severe risk that the coin's motion when it reaches the sensor will not have stabilised to such an extent as to ensure accurate test results. Another aspect of. the invention relates to a coin validator which can be used for testing at least two ranges of coin denominations (which ranges may over¬ lap) , the validator being operable to provide an output signal on a first output line if a received coin is of a denomination belonging to one of those ranges, and an output signal on a second line if the denomination of the received coin belongs to the other of the ranges. Preferably, in addition to these outputs (referred to herein as ACCEPT signals) , the validator may also be arranged to provide an output indicating the specific denomination of the coin received; the same output can be used to represent different denominations of respect¬ ive ranges, so that the actual denomination received is indicated by both the output signal itself and the line upon which the ACCEPT signal appears.

SUBSTITUTESHEET

Other aspects of the invention relate to a validator which can be used in a test mode for checking its operation. In one aspect, the validator has at least one testing circuit which can be adjusted, and the control circuit can be placed into a test mode in which it can, in response to operation of the testing circuit, provide

SUBSTITUTE SHEET

an output indicating the manner in which the testing circuit should be adjusted. In another aspect, a coin validator can operate in a validation mode in which a coin of a particular denomination is determined as acceptable if various measured properties all fall within respective ranges, and in a test mode in which its capability of accurately validating coins is checked . by determining, upon measuring a coin of the said denomination, whether the measurements all fall .within respective ranges which are narrower than the correspond¬ ing ranges used in the validation mode. In accordance with a further aspect, a coin validator control circuit is operable to process coin property measurements differently in dependence upon whether or not the validator has been placed in a test mode, so that for example the control circuit can normally produce an output-which represents the acceptability of an inserted coin, but in the test mode can produce ^* an output which provides an indication of how well the validator is working and/or how the circuit should be adjusted. Arrangements embodying the invention will now be described by way of example with reference to the accompanying drawings, in which:

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Fig. 1 schematically illustrates a coin passageway of a coin validator in accordance with the invention;

Fig. 2 is a schematic circuit diagram of the coin validator; Fig. 3 is a circuit diagram of an arrival sensor of the validator; Fig. 4 is a circuit diagram of a material sensor in a modified embodiment of the validator;

Fig. 5 is a schematic diagram of the circuit of the modified embodiment; and

Figs. 6A and 6B are views of opposite sides of a printed circuit board carrying a testing coil used in each embodiment of the validator.

Referring to Figs. 1 and 2, the validator 2 has a main processor 4 which uses an arrival/diameter sensing circuit 6 and a material/thickness sensing circuit 8 for detecting the arrival of coins and for testing those coins and providing signals indicating whether a coin is genuine, and if so the type of the coin. The arrival/diameter sensing circuit 6 has a sensing coil 10 connected in an oscillator circuit to be described in more detail subsequently.

The coil 10 is situated at one side of a coin passageway 7. The passageway 7 is inclined and canted so that coins, such as that shown at 9, travel down the passageway 7 in the direction A with their faces in contact with the side of the passageway on which the coil 10 is located. The circuit 6 is

SUBSTITUTE SHEET

so arranged that the signal appearing at the output 12 of the circuit 6 has a frequency .which alters as a coin passes the coil 10, and which peaks at a level predomin¬ antly dependent upon the diameter of the coin. The material/thickness sensing circuit 8 has a coil 14 disposed at the opposite side of the coin passageway 7 from the coil 10. The coil 14 is connected in an oscillator circuit, and the circuit is so arranged that the signal appearing at the output terminal 16 is attenu- ated in response to a coin passing the coil 14. The peak level of attenuation is predominently dependent upon the material from which the coin is made, and the thickness of the coin. Because the coin contacts the side of the passageway 7 opposite to that on which the coil 14 is located, the spacing of the coin from the coil will depend upon coin thickness, so that it is ensured that this will have a significant effect on the output of circuit 8.

The processor 4 is a CMOS 8048 (or CMOS 8049) micro- processor. This has terminals P1 , P2, P3, P4 and P5, which can be used as, respectively, a clock output terminal, an interrupt input terminal, a reset input terminal, an input/output terminal and a testable input

-

terminal. There are also address/data bus terminals D ^' . The remaining terminals referred to below are further input/output terminals which, unlike the terminal P4 which is used at different times as both an input and an output, are only required to perform a single input or output function in the particular circuit shown. The processor 4 also has power supply terminals, clock input terminals etc. which are not shown in Fig. 2.

SUBS ^T I ^T UTESHEET

The processor 4 has in its instruction set a HALT instruction, which when executed causes the processor to enter a quiescent state, in which no processing operations are carried out and the power consumption is substantially reduced. The processor can be switched back to an active state by a signal on the interrupt terminal P2.

The validator is installed" in a pay telephone. Under normal circumstances the entire validator is switched off. When the handset is lifted, parts of the validator circuit, including the processor 4 and arrival/diameter sensing circuit 6, but excluding the material/thickness sensing circuit 8, are switched on. The processor 4 then executes an initialisation routine, following which a HALT instruction is executed so that the processor enters a quiescent state.

The oscillations appearing at the output terminal 12 of the arrival/diameter sensing circuit 6 are delivered via gates 18 and 20 to the clock input 22 of a counter 24. The counter has output terminals C1 to C10. The counter counts the pulses until a signal appears at count output C10. This signal is delivered to -the interrupt terminal P2 of the processor 4 in order to cause the processor to enter its active state. The

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processor then proceeds to issue on line 26 a clear signal which is delivered to the clear terminal 28 of the .counter 24. The processor also delivers on line 30 a signal for closing the gate 18. The processor 4 then temporarily opens the gate

18 for a predetermined duration. The counter 24 is thus caused to count the pulses appearing at the output terminal 12 of the circuit 6. The final count, which appears at the count terminals C1 to C8, is noted by the processor 4 which has input/output terminals connected to those count terminals, before the counter 24 is cleared by the processor.

The processor 4 has a memory into which the count is stored, the arrangement being such that the memory always stores the previous count measured in this way. The processor determines that a coin has arrived at the coil 10 if the second count exceeds the first by more than a predetermined number. Thus, a coin is detected in response to an increasing frequency appearing at the output terminal 12.

Assuming that a coin has not been detected, the processor 4, after clearing the counter 24, opens the gate 18 and executes the HALT instruction. The processor 4 will then adopt its quiescent state until a signal appears

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once more at the count terminal C10.

The processor is thus regularly caused to enter its active state in order to determine whether or not a coin has arrived, and if not the processor re-enters its quiescent state. This may occur at intervals of, - a" for example, 5 milliseconds, the processor being active for

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a period of less than 1 millisecond during each of these intervals. The average current consumption of the processor 4 is thus low.

Assuming that the arrival of a coin is detected, the processor 4 then continues to Sample the frequency of the signal appearing at the terminal 12. The frequency continuously increases until a peak is reached, ^* • following which the frequency decreases until an idling level is reached, after the coin has left the coil. The processor 4 recognises and stores ^' the peak and idle levels, and thereafter calculates the ratio of these two levels in order to produce a diameter-indicating value.

At some stage, in response to detecting the arrival of a coin, the processor issues on line 32 a signal for operating a power switch 34. This causes the power supply to be connected to the material/thickness sensor circuit 8.

The processor 4 may be arranged to switch on the material/thickness sensor circuit 8 immediately after the detection of the arrival of a coin to ensure that the operation of circuit 8 has stabilised by the time the coin reaches coil 14. Alternatively, to conserve power, the processor 4 may be arranged to switch on the circuit 8 after detection of the peak in the output frequency of the signal at terminal 12, or possibly when the processor 4 has detected that the frequency has dropped to an idling level.

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As a further alternative , the processor 4 -may be arranged to check that the diame ter value is appropriate for a genuine coin of a denomination which the validator Is arranged to accept before switching on the circuit 8 . In this way , the circuit 8 will ^■ not be operated unless the coin has an acceptable diameter , and thereby power consumption is further reduced.

Once the diameter value has been calculated and the circuit 8 switched on, the processor 4 issues a signal on line 30 to close the gate 18, so that no more pulses -from the circuit 6 can reach the counter 24. The counter is cleared, and the processor issues a signal on line 36 to open a gate*38. -This permits the gate to pass pulses from the terminal P1 via the gate 20 to the clock input terminal 22 of the counter 24.

The counter 24 thus counts up at a constant, ^• predetermined rate. The count terminals C1 to C8 are connected via resistors R1 to R8 to respective points on a series resistor netv/ork R9 to R16 coupled between ground and one input 40 of a comparator 42. The other input-44 of the comparator 42 is connected to the output terminal 16 of the circuit 8. . The resistors R1 to R16 act as potential dividers in such a manner that a signal at any one of the count

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output terminals C1 to C8 will produce, at the input terminal 40 of the comparator 42, a voltage corresponding to the respective count terminal. The effect of this is to cause the voltage at the terminal 40 to increase progressively in a stepwise manner as the count reached by the counter 24 increases. The resistors are of close- in¬ tolerance to ensure an even distribution of the voltages produced as the count increases.

After the processor issues, the signal from terminal P4 which opens the gate 38, the terminal is switched so that it now behaves as an input terminal. As. the voltage at the input terminal 40 of the comparator 42 increases, it will eventually rise past the voltage at terminal 44 from the circuit 8. At this time, the output of comparator 42 will switch logic levels, thus closing gate 38 and preventing further pulses from reaching the counter 24. This change in logic levels will also be sent to. terminal P4 of the processor 4, which is detected by the processor 4 and used to indicate that the count output terminals C1 to C8 should be read. The count will be a digital representation of the analog voltage at terminal 16 of the circuit 8.

The counter 24 is then cleared, the terminal P4 switched to behave as an output terminal, and the gate 38 re-opened so as to permit the processor 4 to take a further measurement of the output signal appearing at terminal 16 of the circuit 8.

The comparator 42 has an open-collector output so that this and the terminal P4 can be directly connected to the gate 38, whereby each can control gate 38, without interfering with each other. The processor 4 repeatedly, measures the output appearing at terminal 16, and determines from these measurements ^' the idle value. This is done before the coin reaches the sensor coil 14, and may be initiated by the circuit 6 sensing the departure of the coin from coil 10. Then as the attenuation ^' increases during the movement of the coin past the sensor, the peak value of the signal is determined. This is preferably achieved by storing successive measurement values. .The processor detects when these values alter in such a manner as to indicate that the attenuation is decreasing due to the coin leaving the sensor. The processor then averages the stored values, preferably ignoring the more recent measure¬ ments so that.the values used represent measurements taken when-the coin was substantially at the mid-point of its travel past the sensor. For example, the processor may be arranged to take the average of the first, say, four of the last twelve measurements. Of course,. instead of taking an average measurement by summing a predetermined number of values and then dividing by that number, so as to compare the resulting value with a stored range, the processor

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could simply sum the values without dividing the result; the stored ranges would be correspondingly greater. - The ratio of the idle and peak values is . .determined in order to produce a thickness/material- indicating value. The idle value is measured before the peak so that the decision as to whether an accept/ * reject gate should be opened can be made very soon after the peak has been reached, and therefore little space is required between the coil 14 and this gate. At the end of the thickness/material testing operation, the circuit 8 is switched off, the counter 24 is cleared and the gate 18 is re-opened to allow the pulses appearing at output terminal 12 of circuit 6. to reach the counter 24.

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For each of the denominations of coins which the validator 2 is designed to accept, the processor 4 stores information defining a diameter range and a material/thickness range. For example, the processor 4 may store upper and lower limits of the respective ranges, or alternatively may store a single value from which the processor can calculate, using a stored or predetermined tolerance, the appropriate range. The processor 4 compares the two measurements, i.e. the diameter value and the thickness/material value, with the ranges for the respective coins, and determines

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that a valid coin of a particular denomination has been received if both values fall within the appropriate ranges for that denomination _, . In that case, the processor 4 produces on one or both of data lines 46 an ACCEPT signal, and on lines 48 a binary signal indicating the denomination of the coin.

The coin validator 2 is intended for installation in various types of machines, e.g.. gaming machines. In some of these, it is desired that the machine be capable of accepting a first range of coins (e.g. 5p, 10p, 20p and 50p U.K. denomination coins), and in other machines a different range (e.g. 10p, 20p, 50p and £1 coins). To cater for this without requiring different types of validator to be manufactured, the validator is arranged to recognise all five coins and generate ACCEPT signals on lines 46 in accordance with the range of coin denomin¬ ations within which a received coin lies. Thus, if the denomination of a received coin falls within both ranges (e.g. for 10p, 20p and 50p coins) an ACCEPT signal is generated on both lines 46, and the coin denomination indicated by the data on lines 48. If the coin denomina¬ tion lies in only one range (e.g. 5p) , then only one of the lines 46 (corresponding to that range of denomin-

ations) carries the ACCEPT signal while the lines 48 carry data representing the denomination 5p. When a coin denomination which belongs only to the other range is received (e.g. a £1 coin), the same data on lines 48 can be generated, but this time ^" the ACCEPT signal is generated on the other of the lines 46.

Accordingly, the same validator can be installed in any of the above types of machines, and in each case it is merely necessary to select which of the lines 46 is to be used in accordance with the range of denominations which, the machine is intended to accept.

-There -is-a danger that the processor 4 may "hang-up", i.e. may cease to operate properly, for example due to electrical noise or inter- ference. To avoid problems caused by this faulty operation, the validator 2 has a reset pulse generator 50, which produces a pulse of predetermined length to reset the processor 4 in the event that any one of three conditions indicative of "hang-up" occurs. As mentioned above, the output of counter terminal C10 is used to deliver a signal to interrupt terminal P2 of processor 4, which causes the processor to issue a signal on line 26 to clear the counter 24. If this does not occur, due to faulty operation of the processor 4, the counter will not be cleared and will continue to

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count in response to pulses from the circuit 6. Eventually, an output signal will appear at terminal C9 of the counter 24, and the simultaneous appearance of signals at terminals C9 and C10 will be detected by a gate 52, which will deliver an* activating signal* via a gate 54 to the circuit 50 to cause resetting of the processor 4.

The gate 54 has two further inputs connected to respective detection circuits 56 and 58. Each of these receives a signal at its input and delays that signal, but the signal appears at the output only if the input signal lasts for more than a predetermined •». amount of time. Circuit 56 is connected to the clear terminal 28 of the counter 24, so that if after issuing a signal to clear the counter the processor suddenly begins to behave incorrectly, the signal at the clear input terminal 28 will persist longer than it should, and this will be detected by the circuit 56 which will issue a signal via gate 54 to circuit 50 to cause resetting of the processor 4.

The circuit 58 has its input connected to the line 30 which carries the signal issued by the processor 4 to close the gate 18. The longest time for which the gate 18 is closed occurs when the processor is measuring the output of circuit 8. The delay of circuit 58 is set to be longer than this time. If the processor 4 begins to behave incorrectly during the thickness/material measuring operation, and the gate 18 thus remains closed, this will be detected by the circuit 58 and cause resetting of the processor.

Even if the processor 4 begins to behave improperly, it may nevertheless execute an interrupt routine, initiated

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by the signal delivered to terminal P2, in a correct manner. To detect this situation, the processor 4 is arranged to set a number of internal flags while execut¬ ing the arrival detection routine. During the interrupt routine, the processor checks to see that these flags are set. If they are not, because the main routine was not being executed properly, the processor 4 executes an instruction which causes it to be reset.

The validator is preferably made in such a way that the coin measurements which are made produce fairly predictable results for given denominations, so that the parameter ranges stored by the processor 4 do not have to be specially worked out for each validator. However, to accommodate slight variations between validators, and changes in a particular validator due to ageing or drift, the sensing circuits 6 and 8 can be adjusted in respect of frequency and/or gain to vary their outputs.

To facilitate the making of adjustments, the processor 4 can be switched into a test mode by connect¬ ing a link 59 between a power supply rail and the testable input terminal P5, which terminal is normally held at a low potential by a resistor R17 connected to .ground. At the same time, the operator connects a device to the data lines D to display the potentials on these ^' lines.

.-. I -_ 1 VS- nHEizET

After switching the validator into the test mode, the operator inserts a coin of a particular denomination (e.g. 10p), and determines what signals are produced on the data lines 46 and 48 in response thereto. The inserted coin is preferably specially selected so that its properties are of an average value with respect to the normal variations expected of coins of that denomina¬ tion.

The processor 4 operates ^" as described up to and including the obtaining of digital values representing the measurements made by the sensing circuits 6 and 8. At that time the processor checks the terminal P5, and if this is found to be high the processor then executes a test routine instead of continuing with the validation operations described above.

In the test routine, the values derived from the sensing circuits 6 and 8 are compared with a special set of "test ranges", instead of with the normal acceptability ranges. These test ranges correspond to the ranges used to determine whether an acceptable coin of the particular denomination (e.g. 10p) has been received, except that they are narrower than the accepta¬ bility ranges.

In the test mode, the processor's output on data lines 46 and 48 is in a different format, and has a

different meaning, from the outputs in the normal valid¬ ation operation. In the test mode, if both measured pro¬ perties upon insertion of the coin are within the respective test ranges, a high-level logic signal is ^{■ ~} 5 applied to all the output lines- 46 and 48. If the value derived from the sensing circuit 6 exceeds or falls below the respective range, the lines 46 are caused to carry a binary value of "10" or "01", respectively. Similarly, if the value derived from sensing circuit 8 exceeds or

10 falls below its respective test range, the value produced on lines 48 is "10" or "01", respectively. An output value of "0000" on lines 46 and 48 is reserved for situations in which the sensing circuits 6 and 8 produce incorrect values which are clearly not due merely to poor

15 ^' adjustment (e.g. values resulting from two coins being detected at the same time, -a poor coin flight path, etc.) so that the operator will be able to take appropriate action.

Referring now to Fig. 3, the arrival/diameter

20 sensing circuit 6 comprises the coil 10 connected in a Colpitt's oscillator circuit. In the particular config¬ uration used here, an amplifier formed by a transistor 60 has a feedback loop including the coil 10 connected between its collector and base. The coil 10 is connected

25 in series with an adjustment circuit comprising variable resistor 61 connected in parallel with inductance 63-

SUB TPTI ITC

Capacitors 62 and 64 are each connected between, on the one hand, a respective end of the circuit formed by components 10, 61 and 63, and on the other hand, ground. . The variable resistor 61 is used for the adjustment made during the test mode.

Resistors 66, 68 and 70 are provided for biasing the transistor 60 into conduction. The load on the transistor 60 is distributed between a collector impedance, (formed by a resistance RL and an inductance LL) and the resonant circuit formed by the components 10, 61, 62, 63 and 64.

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Thus, the output voltage appearing across the capacitor 62 is dependent to a large extent on the fixed impedance RL and LL. Thus, although the passage of a coin

_ • in proximity to the coil -10 will cause some attenuation of this voltage, the degree of attenuation will be relatively small, because the load impedance does not change, compared with a circuit such as those used in the above-mentioned British Patent Specification No. 2093620, in which the coil is connected to the collector current path and therefore has a very substantial effect on the output voltage. The incorporation of inductance LL increases the stability of the output voltage with changes in frequency.

Accordingly, the circuit 6 can be arranged so that it normally consumes a low level of current, but nevertheless will provide an output signal which will not disappear even when a. coin is in close proximity to the coil 10. This makes the circuit particularly suitable for use as an arrival sensing circuit. To reduce cost and power consumption, the circuit is, as mentioned above, also used for.measuring purposes. It has been found that if the coil 10 is suitably arranged for diameter measurement, and the frequency of the output rather than the amplitude is used for measurement purposes, good discrimination can be achieved with the same low operating current as is used for arrival sensing.

A modified version of the above embodiment will now be described with particular reference to Figures 4 and 5. This embodiment operates in a similar manner to the one,.described above, and similar reference numbers will be used for similar parts, except for ^' the points set out below. ^• •* In the previously described embodiment, the sensing circuit 8 produced an output whose amplitude was sensed in order to provide an indication of the material and thickness of the coin. In the embodiment of Figures ^" 4 and 5, the sensor is used for providing an output which is predominantly dependent upon the material of the coin, and somewhat less dependent upon thickness. In this case there are. two coils 14 and 14* (the latter of which is shown in phantom in Figure 1) positioned on respective sides of the coin passageway. .-As in the earlier embodiment, the amplitude of the output of the sensing circuit 8 is used for measurement purposes; however in the present embodiment the frequency of the output is used as an additional measurement. In total, there are therefore three measurements, which are compared with respective stored ranges, and as a consequence of this the rejection of non-genuine coins is made much more reliable. ^" Figure 4 shows the circuit 8, which is addition¬ ally suitable for use in the first-described embodiment.

OMPI _

The circuit has a standard oscillator configuration, using a transistor 100. The two coils 14 and 14', which are in field-aiding relationship,are connected in series with each other and with a variable inductance 102. The inductances are connected in the collector path of the transistor 100. The emitter path includes a variable resistor 104.

The output of the circuit 8 is indicated at 106, and is taken from the collector of. trarisirstor ^* 00; ^•• As a coin passes between the- sensors 14 and 14', both the frequency and amplitude of the output signal vary.

^• These parameters can be adjusted using the variable inductance 102 and the variable resistor 104. Preferably the frequency is adjusted first using the variable inductance 102, as this will also have an effect on amplitude.

Referring to Figure 5, in this embodiment the microprocessor 4 is of the Motorola 6805 family. This has a plurality of ports which can be used as input or output terminals. In the arrangement shown, terminals 11 to 13 are used as input terminals, and terminals 01 to 011 are used as output terminals.

The microprocessor has an internal counter which can .be clocked at regular intervals so that it acts as a timer the operation of which can be initiated or halted by the application of a signal to terminal T1. Alter¬

" " - -

natively, the counter can be used to count pulses appearing on terminal T1. This internal counter is used in place.of the counter 24 of Figure 2.

The microprocessor 4 can operate a switch 150 which selectively delivers the output pulses of sensing circuit 6 to a divide-by-four circuit 152 formed of two

^• >* flip-flops. The output of circuit 152 is delivered to the terminal T1. The internal counter can thus be used for counting pulses from the circuit.6 and hence measuring the frequency of the output. The states of the flip-flops in circuit 152 are detected on input lines 12 and 13 so that two extra bits of resolution can be achieved. When counting is commenced, the circuit 152 is released from its set state by changing the signal appearing on output terminal 05. After the measuring operation, the circuit 152 is held in a set state which allows the input terminal TI to receive other signals, as will be described.

In particular, the output of sensing circuit 8 is delivered via another microprocessor-controlled switch 154 to terminal T1 so that the frequency of this output can be measured. In this case the divide-by-four - circuit 152 is not required as the .coils 14, 14 ^* are driven at a substantially lower ^' frequency than the coil 10.

The output of the sensing circuit 8 is also delivered via a rectifying circuit 156 to a comparator 158. Another input of the comparator 158 is connected

_ to a junction between a constant current charging circuit 160 and a capacitor 162.The charging circuit 160 can be switched on or off by an output terminal 02 of the microprocessor 4.

In operation, in order to measure the amplitude of the output of sensing circuit ^" 8, the microprocessor switches on the charging circuit 60 and at substantially the same time starts the internal counter, which is acting in its timer mode. This causes the voltage on the capacitor 162 to rise linearly. As soon as this voltage equals that from the rectifying circuit 156, the output of comparator 158 switches polarity, which is detected at input terminal 11. The microprocessor senses this, and determines the count reached by.the internal timer, which is digital representation of the amplitude of the output of sensing circuit 8. The output of the comparator 158 is delivered to the timer terminal T1 via a microprocessor-controlled switch 164. This is to ensure that the operation of the timer is halted immediately the output of the comparator 158 changes state; this avoids problems caused by the delay in the microprocessor first detecting the change in state at terminal 11 and then halting the timer.

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Thus, the internal counter measures (a) frequency of output of sensing circuit 6, (b) frequency of output of sensing circuit 8, and (c) amplitude of output of sensing circuit 8. The circuit operates substantially as described t> with reference to Figure 2. However, after the coin starts to leave the coil 10, the microprocessor 4 first measures the amplitude of the output of sensing circuit 8, then measures its frequency, and then once more measures the amplitude. The two amplitude measurements are averaged to obtain the idle amplitude value. The frequency measurement takes place over a sufficiently long time •that .any slight fluctuations in frequency ^" do not affect the result. Subsequently, amplitude measurements are repeatedly taken. As the coin- enters the space between coils 14 and 14', the amplitude will start to decrease. Successive amplitude measurements are compared, and once the amplitude stops decreasing, a frequency measurement s made. Thereafter, a succession of further amplitude measurements are made, and when they indicate that the coin is leaving the coils 14, 14', a plurality of these measurements (preferably excluding the most recent measurements) are averaged to obtain the peak amplitude value.

This operation gives rise to three measurement values, each comprising the ratio of an idle value with the peak value, which are compared with respective

_ ranges to determine whether the coin is valid, and if- so the denomination of the coin.

If the coin is valid, an ACCEPT signal is it- delivered on output terminal 07, and the denomination of the coin is indicated by the signals on lines 08 and 09. The microprocessor 4 also times the interval between the coin arriving at the coil 10 and departing from the coils 14, 14'. If this interval is less than a predetermined value, it is indicative of a coin which is travelling too fast for accurate measurement, and the coin is therefore rejected. Also, the microprocessor checks the successive values of the frequency of the sensing circuit 6, and successive values of the amplitude of sensing circuit 8, and if either of these is altering too rapidly the coin is rejected on the basis that it is travelling either too fast or in an unstable manner.

When an operator wishes to test the operation of the validator, he operates a switch or connects a link to issue a pulse to an interrupt terminal INT of the micro¬ processor 4 (instead of using a test terminal T1 as in Fig. 2) . This causes the microprocessor to execute an

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interrupt routine which results in signals being generated on a serial data output line 010 in response to a coin passing the coils 10,. \k\ .14'. The operator inserts a coin having known characteristics, such as a coin of a particular denomination which has been chosen so as to have substantially exactly average properties. The microprocessor compares the three measurements, produced by this coin with special ranges which are narrower than. hose normally used for this denomination of coin, and as a consequence the data on output line 010- indicates what adjustments need to be made to the sensing circuits 6 and 8.

The operator has a test device connected to receive the data from output terminal 010 and clock pulses from output terminal 011. The device includes logic circuitry which decodes the data so as to provide a display indicating whether and in .which manner any of the components 61 (Fig. 3), 102 and 104 (Fig. 4) need adjustment. The switches 150, 154 and 164 of Fig. 5 may be simply logic gates, such as NAND gates.

Referring to Figs. 6A and 6B, in conjunction with Fig. 1, a preferred form of the coil 10 will now be desςribed. The coil is formed by a printed circuit etched on both sides of a double-sided printed circuit board 80. Fig. 6A shows the side 82 of the board 80 ,► which in use is more closely adjacent the coin path, and Fig. 6B shows the opposite side 84. The board 82 is located in a plane parallel to the side walls of the passageway 7. . On each side, the printed circuit board has been etched to form a spiral conductive pattern having an overall substantially circular configuration.

Referring to.Fig. 6A, the side 82 carries two terminal portions 86 and 88. The conductive path starts from the terminal portion 86 and then spirals inwardly to an inner contact portion 94..

The terminal portions 86 and 88 are positioned directly opposite corresponding terminal portions on the side 84 which are respectively labelled 86' and 88', and may if desired be connected thereto by respective plated through-holes. The inner contact portion 94 is connected via a plated through-hole to a corresponding contact portion 94' on the side 84. From there, the printed circuit pattern spirals outwardly to terminal portion 88 ' .

SUHSTTTUTE ET

Thus, the terminal portions 86 and 88' form the opposite ends of the coil 10. In use, the field created by the portion of the coil 10 on side 82 will extend in the same direction as the field produced by the part of the coil on the side 84. The respective parts of the coil 10 on the opposite sides of the board 80 can be positioned very accurately with respect to the coin path, so that there is good consistency in the measurements produced by the coil 10 from validator to validator. . Thus, only minor adjustments using the variable resistor 61 of Fig. 3 are needed.

The bottom .edge of the coil 10 is located at or preferably slightly below the bottom of the coin path so that if a coin passing _. the coil 10 tends to bounce there is little or no effect upon the coil area covered by the coin and hence upon the measured value.

The formation of an inductance by the use of a printed circuit is regarded as being in itself an independent aspect of the invention. Such an inductance may measure or produce electromagnetic field changes,. and is particularly useful where an accurate positioning of the inductance is desirable.

The term "coin" has been, used herein to cover .not only genuine coins but also non-genuine coins or other items which might be received by the validator.

10 Various aspects of the invention are set out in the accompanying claims. Most of these aspects are claimed in combination with other features, and indeed some combinations of aspects give rise to particular advantages not achieved by the individual aspects alone. ^"•* - ^> However, it will be clearly appreciated from the explicit and implicit indications herein that many aspects are independently novel, inventive and advantageous.

SUBSTITUTE SHEET