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WIPO Patent Application WO/2004/036615

A1

An upper wiring electrode (16) serving as a power feed line to an upper electrode (13) of a thin−film type electron source array is underlaid with a second layer insulation layer (15) to prevent a short circuit. The electron emission part is limited by the second layer insulation layer (15) to cover defects unevenly distributed over the boundary between an electron acceleration layer (12) and a first layer insulation layer (14), so that insulation breakdown with time is prevented.

Sagawa, Masakazu c/o Hitachi Research Laboratory (Hitachi Ltd., 1-1, Omika-cho 7-chom, Hitachi-shi Ibaraki, 319-1292, JP)
Kusunoki, Toshiaki c/o Hitachi Research Laboratory (Hitachi Ltd., 1-1, Omika-cho 7-chom, Hitachi-shi Ibaraki, 319-1292, JP)
Suzuki, Mutsumi c/o Hitachi Research Laboratory (Hitachi Ltd., 1-1, Omika-cho 7-chom, Hitachi-shi Ibaraki, 319-1292, JP)

PCT/JP2002/010835

April 29, 2004

October 18, 2002

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HITACHI, LTD. (6-6 Marunouchi 1-chome, Chiyoda-ku, Tokyo, 100-8280, JP)
Sagawa, Masakazu c/o Hitachi Research Laboratory (Hitachi Ltd., 1-1, Omika-cho 7-chom, Hitachi-shi Ibaraki, 319-1292, JP)
Kusunoki, Toshiaki c/o Hitachi Research Laboratory (Hitachi Ltd., 1-1, Omika-cho 7-chom, Hitachi-shi Ibaraki, 319-1292, JP)
Suzuki, Mutsumi c/o Hitachi Research Laboratory (Hitachi Ltd., 1-1, Omika-cho 7-chom, Hitachi-shi Ibaraki, 319-1292, JP)

H01J1/312; H01J29/04; H01J29/48; H01J31/12; (IPC1-7): H01J31/12; H01J29/04

Onodera, Yoji (Shin-kyobashi Dai-ichi Nagaoka, Bldg. 9-8, Hacchobori 3-chom, Chuo-ku Tokyo, 104-0032, JP)

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