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Title:
COLUMNAR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2021/005789
Kind Code:
A1
Abstract:
According to the present invention, in forming an SRAM cell, a band-shaped contact hole C3 that does not overlap, in plan view, N+ layers 32a, 32c, 32d, 32af formed on the outer circumferences and tops of top sections of Si columns 6a, 6c, 6d, 6f, that overlaps, in plan view, portions of W layers 33b, 33e on P+ layers 32b, 32e connected to top sections of Si columns 6b, 6e, that is connected to said portions in both an X direction and a Y direction, and that extends in the Y direction is formed. Also, a power supply wiring metal layer Vdd for connecting the P+ layers 32b, 32e via the contact hole C3 is formed. Also, after the power supply wiring metal layer Vdd is formed, a word wiring metal layer WL that is orthogonal to the power supply wiring metal layer Vdd in plan view is formed.

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Inventors:
MASUOKA FUJIO (JP)
HARADA NOZOMU (JP)
Application Number:
PCT/JP2019/027541
Publication Date:
January 14, 2021
Filing Date:
July 11, 2019
Export Citation:
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Assignee:
UNISANTIS ELECT SINGAPORE PTE (SG)
MASUOKA FUJIO (JP)
HARADA NOZOMU (JP)
International Classes:
H01L21/8244; H01L27/11
Domestic Patent References:
WO2009096465A12009-08-06
WO2018123823A12018-07-05
Foreign References:
JP2016021590A2016-02-04
JP2013069770A2013-04-18
Attorney, Agent or Firm:
TANAKA Shinichiro et al. (JP)
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