BACKGROUND

[0001] As is known in the art, common mode transient signals can interfere with circuit operation. For example, a common mode transient can swamp the dynamic range for a given differential input signal. In signal isolator applications, a common mode transient may be an order of magnitude greater than a differential signal input.

SUMMARY

[0002] Embodiments of the disclosure provide methods and apparatus for a common mode transient processing circuit that may suppress, buffer or otherwise mitigate the effects of common mode current signals. Example common mode transient suppression circuits may be useful in digital-isolator parts, as well as a variety of other applications where multi-ground domains are required. In general, embodiments of a common mode transient suppression circuit provide a closed-loop circuit topology that suppress/cancels out input current transients during CMTI perturbations. In some embodiments, the common mode transient suppression circuit includes a closed-loop class AB high bandwidth buffer that is able to sink and source the fast transient current injected at the input of a receiver during CMTI perturbation.

[0003] In example embodiments, common mode transient suppression circuits can separate the common mode and differential impedances to allow independent design of the differential and common mode paths which allows allocation of the maximum differential dynamic range to the signal of interest even in presence of a much larger common mode signal amplitudes. It is understood to those skilled in the art that large common mode signals may undesirably require all of the available dynamic range to process just the common mode signal. In addition, this may not be possible in purely passive filtering approach.

[0004] With active common mode transient suppression, power efficiency and scalability are provided that also enables higher common mode transient immunity operation. By separating the differential and common mode impedances, the maximum available input dynamic range can be used for the differential path and little or no dynamic range allocated for processing the common mode signal. It will be appreciated that this is a significant advantage over conventional purely passive filtering approaches in which the common mode and differential paths share the same impedance.

[0005] Common Mode Transient Immunity (CMTI) is useful to specify the level of immunity in a multi-ground GND domain application to a fast transient perturbation in one domain in reference to the other. Transient perturbations are typically measured in KV/us or V/ns.

[0006] CMTI designs may trade off headroom, bandwidth, and/or gain to set limits in circuit implementations. CMTI provides a measure of the robustness of the system to common mode strikes between the different GND domains. Usually, isolated domains require a degree of robustness to transients that only occur in one of the domains. The electrical isolation will depend on the level of impedance coupling between different boundaries at different frequencies. This is highly correlated to the technology involved in the isolation barrier. In the case of capacitive isolators, the same isolation barrier is shared for the signal path as well the common mode coupling path, which presents certain challenges for CMTI design robustness.

[0007] In one aspect, a signal isolator comprises: a first die comprising a transmit module, wherein the first die has a first voltage domain; and a second die comprising a receive module including a receive amplifier configured to receive from the transmit module a transmit signal that includes a differential signal and a common mode current, wherein the second die has a second voltage domain, wherein the first and second die are separated by an isolation barrier, and wherein the receive amplifier comprises: a differential amplifier to receive the differential input signal from the transmit module; and a common mode module configured to sense the common mode current and sink or source the common mode current and minimize changes to an input impedance of the receive amplifier.

[0008] A signal isolator can further include one or more of the following features: the first and second die have a capacitively coupled signal connection to carry the transmit signal, the common mode module comprises a class AB amplifier, the common mode module is configured to control a regulated input common mode voltage so that a dynamic range of the differential amplifier is used for the differential input signal, the common mode module is configured to control a regulated input common mode voltage so that a dynamic range of the differential amplifier is not used for the common mode current, and/or the receive module is configured to separate a differential impedance and a common mode impedance.

[0009] In another aspect, a method comprises: employing, in a signal isolator, a first die comprising a transmit module, wherein the first die has a first voltage domain; and employing a second die comprising a receive module including a receive amplifier configured to receive from the transmit module a transmit signal that includes a differential signal and a common mode current, wherein the second die has a second voltage domain, wherein the first and second die are separated by an isolation barrier, and wherein the receive amplifier comprises: a differential amplifier to receive the differential input signal from the transmit module; and a common mode module configured to sense the common mode current and sink or source the common mode current and minimize changes to an input impedance of the receive amplifier.

[0010] A method can further include one or more of the following features: the first and second die have a capacitively coupled signal connection to carry the transmit signal, the common mode module comprises a class AB amplifier, the common mode module is configured to control a regulated input common mode voltage so that a dynamic range of the differential amplifier is used for the differential input signal, the common mode module is configured to control a regulated input common mode voltage so that a dynamic range of the differential amplifier is not used for the common mode current, and/or the receive module is configured to separate a differential impedance and a common mode impedance.

[0011] In a further aspect, a signal isolator comprises: a first die means for providing a transmit module and a first voltage domain; and a second die means for providing a receive module including a receive amplifier configured to receive from the transmit module a transmit signal that includes a differential signal and a common mode current, wherein the second die has a second voltage domain, wherein the first and second die are separated by an isolation barrier, and wherein the receive amplifier comprises: a differential amplifier means for receiving the differential input signal from the transmit module; and a common mode means for sensing the common mode current and sink or source the common mode current and minimizing changes to an input impedance of the receive amplifier.

[0012] A signal isolator can further include one or more of the following features: the first and second die means have a capacitively coupled signal connection to carry the transmit signal, the common mode means comprises a class AB amplifier, the common mode means is configured to control a regulated input common mode voltage so that a dynamic range of the differential amplifier is used for the differential input signal, the common mode means is configured for controlling a regulated input common mode voltage so that a dynamic range of the differential amplifier is not used for the common mode current, and /or the receive means is configured for separating a differential impedance and a common mode impedance.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The foregoing features of this disclosure, as well as the disclosure itself, may be more fully understood from the following description of the drawings in which:

[0014] FIG. 1 is a schematic representation of a signal isolator having common mode transient processing in accordance with example embodiments of the disclosure;

[0015] FIG. 2A shows an example waveform for a static CMTI strike wherein the input is HIGH, FIG. 2B shows an example waveform for a static CMTI strike wherein the input is LO, and FIG. 2C shows an example waveform for a dynamic CMTI strike when input data is toggling;

[0016] FIG. 3 shows an example schematic representation of an example receive amplifier having a differential amplifier and a common mode signal processing module; [0017] FIG. 3 A shows a block diagram of a portion of a signal isolator channel, including a receive amplifier having a differential amplifier and a common mode signal processing module;

[0018] FIG. 4 is a circuit diagram of an example receive amplifier having a differential amplifier, a common mode signal processing amplifier, and a biasing circuit;

[0019] FIG. 5 is a circuit diagram of an example class AB common mode signal processing amplifier when a CMTI strike is not present;

[0020] FIG. 6 is a circuit diagram of an example class AB common mode signal processing amplifier when a CMTI strike is present; and

[0021] FIG. 7 circuit diagram of an example class AB common mode signal processing amplifier with indicators to show how signal bandwidth may be determined.

DETAILED DESCRIPTION

[0022] FIG. 1 shows an example system 100 having active common mode transient signal suppression in accordance with example embodiments of the disclosure. In the illustrated embodiment, a first die 102, which includes a transmitter module 104, is connected to a second die 106 in a signal isolator application where the second die 106 includes a receiver module 108. The first die 102 may have a different voltage domain than the second die 106 and the die may be separated by an isolation region 110 that includes a dielectric material.

[0023] In the illustrated embodiment, the first and second die 102, 106 are connected to each other via differential signal connections 112a,b. The respective connections 112 can include isolation capacitors 114, 116 in the respective first and second die 102, 106 and an inherent inductance 1 18 of the bond wire connection through the isolation region 110. [0024] It is understood that the first and second die can be formed from a single die or from discrete die. In general, the first and second die are electrically isolated from each other.

[0025] The second die 106 can include first and second capacitors 120, 122 coupled end-to-end across the differential signals 112a,b and first and second resistors 124, 126 also coupled end-to-end across the differential signals 112a, b. An amplifier 128 is coupled in a feedback configuration with an output 130 coupled to a node between the first and second resistors 124, 126 and to a first input 132 of the amplifier. A reference voltage is coupled to the other input 134 of the amplifier 128. In some embodiments, a transimpedance amplifier (TIA) may be used.

[0026] A first transient suppression module 140 is coupled to the first differential input signal 112a and a second transient suppression module 142 is coupled to the second differential signal 1 12b. Each of the input signals 112a, b contain common mode current ICM, which is undesirable, and differential input current IDIFF, which is the signal of interest. As described more fully below, the first and second transient suppression modules 140, 142 extract (source or sink) the common mode current ICM from the input differential signals 112a, b. The differential current ICM is then presented to the receiver module 108 with the common mode current ICM removed. The differential impedance is separated from the common mode impedance.

[0027] The CMTI specification for a capacitive coupled isolator defines a current being injected from one GND domain (DIE1 domain) to another GND domain (DIE2 domain). This common mode current and in addition to the input differential current, defines the input current dynamic range of the circuit required for proper operation. In a signal isolator, the common mode current is often larger than the input differential current.

[0028] CMTI strikes could be classified in static and dynamic depending on the testing conditions. A static CMTI refers to a case when the inputs are tied to logic high or logic low states while outputs are monitored during the CMTI strike, and a dynamic CMTI condition refers to a case when the CMTI strike happens while input data is toggling and the outputs are being monitored to be fault free (missing pulses, extra pulses, too much delay, etc.)

[0029] FIG. 2A shows a static CMTI strike with an input signal in a HIGH state.

There is some noise JI in the output signal at the rising and falling edges R,F of the ground differential signal (GNDa-GNDb). FIG. 2B shows a similar CMTI strike with an input signal in a LOW state. FIG. 2C shows a series of pulses on an input signal some of which are not present in the output signal, which may also contain some oscillation and/or unknown states OS. The ground differential signal (GNDa-GNDb) shows a normal pulse, missed pulse, extra pulses or error, and excessive propagation delay or pulse width delay error.

[0030] FIG. 3 shows further detail of the circuit of FIG. 1 including a receive amplifier 300 having a differential amplifier 302 with the first and second transient suppression modules 140, 142 of FIG. 1 shown as a single CMTI module 304. The CMTI buffer or suppressor circuit 304 provides common mode feedback (CMFB) or CMTI buffering. The CMTI module 304 provides a low impedance to the common mode injected current ICM without affecting the input impedance of the receive amplifier 300.

[0031] The CMTI buffer or suppressor 304 senses the input signals common mode and sinks or sources that current in common mode way so as to avoid affecting the differential input impedance and signal. Then the differential amplifier 302 amplifies the input signal seen across the resistors 124, 126.

[0032] FIG. 3A shows a portion of an example bi-directional isolator 350 for which the receive amplifier 300 of FIG. 3 forms a part. A receive path includes an IO terminal 352 to receive an input (or output) signal at an IO buffer 354 for a transmit module 356 having an input detector 358, a modulator 360, and a driver module 362. The receive amplifier 300 of a receive module 364 receives the input from the transmit module 356 across the barrier 366. The output of the receive amplifier 300 can be rectified/ demodulated 368, filtered 370, and detected 372. [0033] FIG. 4 shows an example implementation of a differential amplifier 400, such as the differential amplifier 302 of FIG. 3, an example implementation of a transient/ buffer module 402, such as the CMTI module 304, as a class AB amplifier, and an example biasing circuit 404. The amplifier 402 senses the common mode input signals 406 across the resistors and sinks or sources the common mode current to avoid affecting the differential input impedance and signal.

[0034] FIG. 5 shows operation of an example class AB amplifier 500 during no common mode current shown as ICM=0. In the illustrated embodiment, the CMTI suppressor circuit is a fully differential rail-to-rail implementation of a common gate input stage that senses the input voltage through the common mode input pair and injects or subtracts the required input current in a common mode way to maintain the input common-mode voltage stage at the desired level. This allows the buffer to control the input common-mode voltage regulated and extend the input dynamic range to the differential signal only.

[0035] When the common mode current injected is zero, i.e., no CMTI strike ICM=0, the input nodes 502 tend to remain at the selected input common-mode voltage. The currents 504 are balanced so that the output class AB driver only consumes the quiescent current for which it was designed. As can be seen, current mirrors can be used as desired to meet the needs of a particular application.

[0036] In the example embodiment, for a bias current, shown as IBIASP and IBIASN of 40 pA, the amplifier current (IPA +IPB) is 20 p A when ICM=0 is balanced so that the currents are equal at 10 pA.

[0037] FIG. 6 shows example amplifier 600 operation when common mode current ICM is injected during a CMTI strike during which the input nodes 602 tend to increase voltage. The change in the common mode voltage is detected though the input pair of the CMTI suppressor increasing the absolute value of the sum of the currents 604 INA + INB + 21CM- This current imbalance is injected to the class AB common-mode output stage in the node 606 that is charged up to compensate for the input common-mode current to be zero through the output N-MOS transistor 608. [0038] FIG. 7 shows an example amplifier 700 having an input impedance determined based on the input stage transconductances gm and output impedances ro of the amplifier output stage, as set forth below:

[0039] In embodiments, a bandwidth of the amplifier can be determined based on the transconductances, drain source current IDS, a constant K, and a total capacitance CTOT-

[0040] It is understood that the devices in the circled 7 in FIG. 7 are involved in the first order equation above for gm_nmos7 and gm_pmos7.

[0041] The total capacitance CTOT is determined from drain d, gate g, source s and body b capacitances of the transistors.

[0042] Active input impedance embodiments, such as those shown and described above, may provide advantages over passive input impedance configurations. When the input impedance is implemented using a solely passive network, the input dynamic range for differential and common mode are both related to the input impedance RIN RX value. Given that both the signal for the differential mode and the signal for the common mode shares the same impedance path, the current input dynamic range is defined as the maximum total current before reaching the rails at the input of the receiver. This follows since passive configurations need to allocate the differential plus the common mode currents. In many applications, it is usual to find the common mode current being more than an order of magnitude when compared to the differential current, such as for specific CMTI requirements. In this scenario, and more particularly when the input dynamic range is limited to a couple of hundred of mV, passive configurations may not be adequate. [0043] Example embodiments of active common-mode loops to suppress the common mode currents and define the input impedance may overcome limitations imposed by low voltage applications where the input dynamic range is a hundred of mV and where the input impedance maximum limiting value leaves the differential signal too small which compromises the overall gain of the signal path and the signal to noise ratio as well. In example embodiments, the input differential impedance is separated from the common mode impedance. By sensing the common mode current at the input of the receiver amplifier and subtracting it at the same input nodes, such as by using current mirrors, creates a variable common mode impedance that does not affect the differential impedance of the amplifier. This provides a degree of freedom on the calculations of the differential and common modes input impedances (due to dynamic range limitations) and in the same way maximizes the available dynamic range for the differential signal by virtually not consuming headroom or dynamic range in the common mode signal.

[0044] It is understood that processing may be implemented in hardware, software, or a combination of the two. Processing may be implemented in computer programs executed on programmable computers/machines that each includes a processor, a storage medium or other article of manufacture that is readable by the processor (including volatile and non-volatile memory and/or storage elements), at least one input device, and one or more output devices. Program code may be applied to data entered using an input device to perform processing and to generate output information.

[0045] The system can perform processing, at least in part, via a computer program product, (e.g., in a machine -readable storage device), for execution by, or to control the operation of, data processing apparatus (e.g., a programmable processor, a computer, or multiple computers). Each such program may be implemented in a high-level procedural or object-oriented programming language to communicate with a computer system. However, the programs may be implemented in assembly or machine language. The language may be a compiled or an interpreted language and it may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program may be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communication network. A computer program may be stored on a storage medium or device (e.g., CD-ROM, hard disk, or magnetic diskette) that is readable by a general or special purpose programmable computer for configuring and operating the computer when the storage medium or device is read by the computer.

[0046] Processing may also be implemented as a machine-readable storage medium, configured with a computer program, where upon execution, instructions in the computer program cause the computer to operate.

[0047] Processing may be performed by one or more programmable embedded processors executing one or more computer programs to perform the functions of the system. All or part of the system may be implemented as, special purpose logic circuitry (e.g., an FPGA (field programmable gate array) and/or an ASIC (application-specific integrated circuit)).

[0048] Having described exemplary embodiments of the disclosure, it will now become apparent to one of ordinary skill in the art that other embodiments incorporating their concepts may also be used. The embodiments contained herein should not be limited to disclosed embodiments but rather should be limited only by the spirit and scope of the appended claims. All publications and references cited herein are expressly incorporated herein by reference in their entirety.

[0049] Elements of different embodiments described herein may be combined to form other embodiments not specifically set forth above. Various elements, which are described in the context of a single embodiment, may also be provided separately or in any suitable subcombination. Other embodiments not specifically described herein are also within the scope of the following claims.