Title:
COMPOUND SEMICONDUCTOR DEVICE AND PROCESS FOR PRODUCTION THEREOF
Document Type and Number:
WIPO Patent Application WO/2012/008027
Kind Code:
A1
Abstract:
An electrode (109) is so arranged as to be insulated from a compound semiconductor layer (102) and be in contact with an electrode (101) and a compound semiconductor layer (103). The compound semiconductor layer (103) has a lower lattice constant than those of the compound semiconductor layer (102) and the compound semiconductor layer (104), and the compound semiconductor layer (107) has a lower lattice constant than those of the compound semiconductor layer (102) and the compound semiconductor layer (107). The compound semiconductor layer (103) has a higher conduction band energy than that of the compound semiconductor layer (104).
Inventors:
IMADA, Tadahiro (1-1 Kamikodanaka 4-chome, Nakahara-ku, Kawasaki-sh, Kanagawa 88, 〒2118588, JP)
Application Number:
JP2010/061902
Publication Date:
January 19, 2012
Filing Date:
July 14, 2010
Export Citation:
Assignee:
FUJITSU LIMITED (1-1 Kamikodanaka 4-chome, Nakahara-ku Kawasaki-sh, Kanagawa 88, 〒2118588, JP)
富士通株式会社 (〒88 神奈川県川崎市中原区上小田中４丁目１番１号 Kanagawa, 〒2118588, JP)
富士通株式会社 (〒88 神奈川県川崎市中原区上小田中４丁目１番１号 Kanagawa, 〒2118588, JP)
International Classes:
H01L21/338; H01L21/336; H01L21/8234; H01L27/04; H01L27/06; H01L29/12; H01L29/778; H01L29/78; H01L29/80; H01L29/812; H01L29/861
Attorney, Agent or Firm:
KOKUBUN, Takayoshi (5th Floor, NBF Ikebukuro City Building 17-8, Higashi-Ikebukuro 1-chome, Toshima-k, Tokyo 13, 〒1700013, JP)
Download PDF:
Claims: