COMPUTER CONTROL METHOD UNDER COMMUNICATION ARCHITECTURE

WIPO Patent Application WO/2019/051699

A1

A computer control method under a communication architecture. According to the method, an I/O device side generates interruption points with a certain frequency by using a timer interrupt program, and collects sampled data when a first-type interruption point appears; then, each certain sampling point uploads specific sampled data to a host computer side; after the sampled data is processed by the host computer side, a startup flag word and a control data set are formed and then issued to the I/O device side; the I/O device side outputs data in different control data sets when second-type and third-type interruption points appear; and the I/O device side can further upload multiple pieces of continuously sampled data according to requirements. The control method has a wide applicability, can drive an I/O device to control various execution structures, can form a standardized design for I/O, and can store more detailed historical data for offline analysis, thereby facilitating reduction of repetitive development, optimizing a target system, and improving the development efficiency and quality.

JP3089136	[Name of device] Structure of multifunctional gate
WO/2016/097689	A DEVICE CAPABLE OF BEING OPERATED IN DIFFERENT MODES
WO/2013/165350	MIRRORING MEMORY COMMANDS TO MEMORY DEVICES

XUE ZHANYU (CN)
XING JINCHUN (CN)

PCT/CN2017/101675

March 21, 2019

September 14, 2017

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BAODING TECH ELECTRIC CO LTD (CN)

G06F13/38

CN102163181A	2011-08-24
CN103116557A	2013-05-22
CN103092257A	2013-05-08
US20130079897A1	2013-03-28

CREDOIP INTELLECTIAL PROPERTY AGENCY et al. (CN)

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