This invention relates to programmable data processing, and particularly to their interface with various peripherals.

Background Art

Programmable data process ors , and in particular the new generation of microprocessors , due to their rapid processing time and ever expanding storage capability , can accomplish a great deal of computing and controlling operations in a very short time. This type of a processor can and must o ften interface with a variety o f peripheral units and other devices through hardware connections . Microprocessors , specially the so- called personal computers usually offer only two data ports terminals to which the peripheral and auxiliary devices can be connected. Parallel data l ines are usually wired from the processor ' s internal bus to a female connector socket in the back of the unit , and serial data lines are wired to a male connector socket in the back of the processor housing . those connectors also carry a

plurality of control lines. If, for instance, the female parallel socket is connected by way of a cable to a printer and the serial data socket is connected by means of another cable to a magnetic tape drive or other mass storage device, any additional control function between the processor and an auxiliary unit must be routed through special hardware which can switch the data and control lines between the various peripheral units. The problem is particularly acute in an industrial control environment where the computer must interface with a variety of monitoring sensors and process control apparatuses.

A large number of data processing installations rely on backup power systems which intervenes in case of failure of the main power line to allow continued operation for a limited time, or to allow orderly shut-down of the system operation. The task of monitoring the power line and the performance of the backup power system is best performed by the processor itself. However, this requires a direct interface between the processor and the power backup system which usually occupies one of the data ports that is no longer readily available for interfacing with one of the

customary peripheral units.

Disclosure of Invention

The present invention expands the interfacing capability of a programmable data processor by providing a connecting device which can be mounted on one of its data ports but yet provide a matching terminal which is completely transparent to a connecting peripheral unit. An electronic circuit within the device taps one of the data lines and converts any digital waveforms sensed thereon into a control signal for an auxiliary unit such as a backup power system. The circuitry can also receive a voltage from the auxiliary device and transform it into a digital waveform which is applied to one of the port data lines. The interface between the circuitry and the data lines is done through optical converters which completely isolate the data lines from the circuitry itself and the auxiliary unit energizing system.

In the preferred embodiment of the invention the device is used for monitoring the performance of a backup power system and for controlling its operation. Software residing on the data processor

can decide from the information received from the monitoring circuitry when to activate or shutdown the backup power system , and when to orderly shutdown the operation of the processor itself in case both the main power and the backup power supply are about to fail .

Brief Description of the Drawings

Figure 1 illustrates the basic hardware of a data process ing system us ing the invention to control the operation of a power supply backup system ;

Figure 2 illustrates an alternate way in the cabling of the data processing system; Figure 3 illustrates the physical arrangement of the components of the interconnecting device;

Figure 4 is a block diagram of the functions performed by the circuit in the interconnecting device ; Figure 5 is an electrical schematic of the interconnecting device circuitry; and

Figure 6 i s a f l ow diagram o f a program res iding in the proces s or making use o f the invention.

Best Mode For carrying out The invention

Referring now to the drawing, the preferred embodiment of the invention will be described in conjunction with a data processing system 1 which includes a programmable processor 2, a printer 3 and a power-supply backup unit 4. For the sake of simplicity, it shall be assumed that the processor

2 has its own built-in keyboard 5 and display screen 6. As found commonly on many personal computers, the processor 2 has two data terminals - a serial data terminal constituted by a male socket terminal 7 and a parallel data terminal constituted by a female socket terminal 8. Furthermore, the mechanical arrangement of the two terminal sockets have mating correspondence, i.e. if brought together they could be interconnected. The processor power cord 9 is plugged into a power dis¬ tribution terminal of the power supply backup unit 4 which in turn has a power cord 11 designed to be connected to the main power line. Similarly, the power cord 12 of the printer 3 is plugged into the power distribution terminal of the power supply backup unit 4. The connection between the printer

3 and the processor 2 is provided by a cable 13 having a female connector 14 at the printer end and a male connector 15 at the processor end. A

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special connecting device 16 provides the link between the processor 2 and the power supply backup unit 4 to which it is connected by means of a seven wire telephone-type connector 17. At the opposite end of the connecting device 16 a housing 18 has on one side a male connector 19 which is plugged into the female connector 8 of the data processor. On the opposite side of the housing 18 a female connector 20 mates with the male connector 15 at the end of the printer cable 13. The connecting device 16 could have also been used for connection on the male data line port terminal socket 7 as illustrated in Figure 2. In this case, it is the female connector side 20 of the housing 18 which interfaces directly with the processor, while the male connector side 19 is connected to a female connector 21 at the end of a cable 22 which could be leading to another peripheral unit. It should be understood that the assignment of the parallel data line to the female socket 8 and the assignment of the serial data line to the male socket 7 are somewhat arbitrary, and that the invention would apply equally well if the connector assignment was reversed. From the mechanical arrangement of the housing

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18 which is illustrated in Figure 3, one can see that pins 23 on the male connector are directly wired to corresponding pins 24 on the female connector 20 by electrical conductors 25. The housing also includes a printed circuit board 26 having straps constituting part of these electrical conductors 25. The circuit board 26 also receives wires from the cable 16 connected to the power supply backup unit 4. The screws 27 used to secure the male connector end 20 to mating connectors can be removed from their housing 28 and placed in the opposite housing 29 and in opposite directions as indicated in dotted lines in Figure 3. The screw housing 28 and 29 have inside threads which not only match the threads of the pins 27, but also those of which may be found in connectors such as connectors 15 or 21 designed to interface with the terminal sockets 7 or 8 on the processor.

The functions fulfilled by the printed circuit board 26 are illustrated in Figure 4. Any digital wave f orm whi ch appea rs on p in 3 0 o f f ema l e connector 20 or on pin 31 of male connector 19 is trans ferred through an opto-isolator 32 to a voltage pump 33 whose output signal 34 can be used through a driver 35 to control the operation of the

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power supply backup unit 4. Pin 36 acts as a terminal for one of the wires in cable 16. An analog voltage level which is sensed in the power supply backup unit and brought to pin 37 by cable 16 is converted into a digital waveform by the analog-to-digital converter 38. The digital data is run to an opto-isolator 39 and then applied to pin 40 of the female connector 20 and pin 41 of the male connector 19. The clocking pulse 42 for the analog-to-digital converter 38 is provided by the waveform at the output of the first opto-isolator 32. An adjustable voltage divider 43 is provided between input pin 37 and the input of the analog- to-digital converter 38. A constant current generator 44 and a voltage regulator 45 are used to generate a stable voltage supply 46 to the analog- to-digital converter 38. This ensures that the digital information at the output of the converter is an accurate representation of the input voltage (i.e. the monitored signal) unaffected by the change in the circuitry power supply. It can be understood that neither the voltage pump nor the analog-to-digital converter load will interfere in any way with the data lines connected to pins 30 and 40 of the female connector 20 or pins 31 and 41

of the male connector 19. Accordingly, the data lines of the processor 2 as seen by the printer on female connector 20 are completely transparent. Through appropriate programming and timing the processor can, at one point send, during a period of time, some specific data from the data lines to printer 3, and at other times send a coded waveform to the printed circuit board. Similarly, the processor could receive information on the data lines from another type of peripheral units while also being able to receive information on pin 41 of the male socket 7 or pin 40 of the female socket 8 about the operation of the power supply backup unit 4. In the specific application selected to illustrate this preferred embodiment, pin 37 receives the output voltage of the main battery which is at the heart of the power supply backup unit 4, in this case a so-called Uninterruptible Power Supply (UPS). In a UPS, the power line, as long as it is on, charges the battery, and the power which is distributed to the various components of the system is derived from the battery by means of an inverter. In the event that the main power source is cut off or fails, the battery continues supplying adequate power to the

system for a period of time depending upon the capacity of the battery. It then becomes important to monitor the charge status of the battery, so that the processor or the entire system can be orderly shut down before it is discharged. In such an application , the output voltage of the battery is carried through cable 16 to pin 37 of the printed circuit board . This output voltage is converted into a digital data form by the analog- to-digital converter 38 , then placed on one of the processor ports where it can be periodically sampled. When the processor detects a drop in the battery voltage , the operation that may be in process is orderly terminated , the computer goes through a shut-down procedure, then sends a wave f orm on one o f the termina l s whi ch i s transformed into a control signal through the voltage pump to shut down the UPS .

Figure 5 is an electrical schematic of the printed circuit board circuitry . The circled numerals correspond to the actual pin assignments on the male connector 19 , the female connector 20 and the power supply backup unit connector 17. The non-circled reference numbers correspond to those used in Figure 4 . Off-the-shelf components are

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identified by their common commercial nomenclature. Reference numbers pointing to areas of the circuitry corresponds to references used in Figure 4. It should be noted that the choice of pins, data lines, or control lines could be varied according to the design requirements of the system. The monitoring and control of the power supply backup unit 4 by the computer is under the control of instruction residing in the processor memory. Figure 6 is a flow diagram of the program followed by the processor in regard to the monitoring and control of the power supply backup unit A. Upon power-up of the system, the processor reads the battery voltage data which appears either on the SELECT LINE of the parallel port or the RING INDICATOR line of the serial port. This data is used to compute the lowest battery voltage reading which can be tolerated. This limit value is then stored for comparison with subsequent readings. The processor continues reading the battery voltage data and comparing it to the stored acceptable limit until such time as the data indicates that the battery voltage is falling below the acceptable limit. At which point, the processor initializes a shutdown procedure. At the end of the shutdown

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procedure a turnoff signal is sent to the power supply backup unit as a waveform which is placed on the DATA II line of the parallel port or the RTS line of the serial port. Shutting off the power supply backup units cuts the power to the entire system.

It should be noted that the system could use a standby power supply instead of a UPS in such a case the voltage that would be monitored would be indicative of the status of the power line rather than the battery voltage.

While the preferred embodiment of the invention has been detailed with reference to a specific application, it should be noted that other embodiments could be devised and used in a variety of applications without departing from the spirit of the invention and the scope of the appended claims.