Title:
CONFIGURABLE ON-CHIP INTERCONNECTION SYSTEM AND METHOD AND APPARATUS FOR IMPLEMENTING SAME, AND STORAGE MEDIUM
Document Type and Number:
WIPO Patent Application WO/2016/078307
Kind Code:
A1
Abstract:
A method for implementing a configurable on-chip interconnection system. The method comprises: in an interconnection system, master devices set bit widths of bus identifiers of the master devices, wherein the bit widths of the bus identifiers of the master devices are the same (301); and in a memory access process, the mater devices interact, by means of interconnection matrices only, with slave devices according to the bus identifiers (302). Also provided are a system and apparatus for implementing the method, and a storage medium.
Inventors:
JIANG JIANPING (CN)
Application Number:
PCT/CN2015/076672
Publication Date:
May 26, 2016
Filing Date:
April 15, 2015
Export Citation:
Assignee:
ZHONGXING MICROELECTRONICS TECHNOLOGY CO LTD (CN)
International Classes:
G06F13/38
Domestic Patent References:
| WO2003014948A1 | 2003-02-20 |
Foreign References:
| CN101118788A | 2008-02-06 | |||
| CN101937412A | 2011-01-05 | |||
| CN101004727A | 2007-07-25 |
Other References:
See also references of EP 3223162A4
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
北京派特恩知识产权代理有限公司 (CN)
北京派特恩知识产权代理有限公司 (CN)
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