CONTACTLESS VOLTAGE MEASUREMENT The present invention relates to a device for measuring an alternating voltage, herein also referred to as the measurand voltage, between two cables connected respectively to two alternating voltage sources VA, and VB. The invention does not require the device to make galvanic contact with either cable and does not require the device to make any galvanic contact with earth. In many cases conducting cores of the two cables will be sheathed, wherein the invention permits the voltage between them to be measured without the need to remove or break into the sheaths. In the field of electrical power engineering there is a need to measure accurate A.C. voltage between insulated conductors without breaking into the insulation. This could be for reasons of safety or practical convenience. Known methods such as the voltage reference method are utilised in patents: US2018136264A1 (Steuer et al), US5473244A (Libove et al), and GB2156086A (Jones B.E. and Young J.S.). These provide a contactless measurement method, but are only able to measure the voltage difference between the insulated conductor and ground (which is not always 0), and can only provide a contactless voltage measurement for a single sheathed cable, i.e they are not suitable for measuring the voltage between a pair of insulated conductors. Referring to fig 1 it is a trivial matter to detect the presence of an alternating voltage 2 on a sheathed wire 6, but not to detect an accurate magnitude. This detection is performed by simply offering up to the wire a conducting element 4 (electrode) connected to a high impedance voltmeter 17. If both are referenced to the same conductor (notionally ground) 1, then the alternating electric field surrounding the sheathed cable 6 induces a voltage in the electrode by virtue of the coupling capacitance 10 between the two, and hence produces a measurable value. To determine the presence of a voltage between two sheathed cables then, similarly, referring to fig 2, a first electrode 4 is offered to a first sheathed cable 6 thereby creating a first coupling capacitance A 10. A second electrode 5 is offered to a second sheathed cable 7 thereby creating a second coupling capacitance B 11. A voltmeter 17 is connected between the electrodes 4 and 5. Once again, this produces a measurable value. However, said values measured in figs. 1 and 2, are inaccurate because they fail to take into account the magnitudes of coupling capacitances A 10 and B 11, in conjunction with the effect of stray capacitances, thereby affecting the measured voltage on the terminals of the voltmeter 17. Referring to fig 3, a better solution is to surround at least a section of the sheathed cables 6,7 connected to voltage sources 2,3, electrodes 4,5 and voltmeter 17 , with a conducting surface 14 to isolate the components from electromagnetic fields that may exist in the vicinity of the apparatus. This would, in principle, produce the correct voltage reading for any values of the coupling capacitances A 10 and B 11 except for the fact that there are still additional capacitances that are not, as yet, included in the model. An augmentation of fig 3, is shown in fig 4 whereby two additional capacitances X 21 and Y 22 from the electrodes 4,5 to the conducting surface 14 are now introduced, together with an additional capacitance G 15 from the conducting surface 14 via a voltage source VG 18 to ground/earth 1. It should be noted that the outer conducting surface 14 has a connection to earth as a consequence of its free space or body-to-earth capacitance G 15 . Fig 4 can be redrawn as an electrical schematic, shown in fig 5. It can be seen that the voltmeter 17 measures the voltage between two nodes in two potentiometer chains, each of which is now dependant on the values of A 10 and B 11 and also X 21 Y 22 and G 15. Fig 6 represents a conducting body-to-earth-capacitance model whereby the conducting sphere 131 may include a direct capacitance to earth 124 and a number of indirect capacitances to earth, wherein the conducting sphere 131 is capacitively coupled 120, 125, to other conductors such as cables, which themselves may carry an alternating voltage V1 127, V2 128, or people 132 in it’s vicinity , that are either galvanically or capacitively 121, 122, 123, 126 coupled to earth 1. This capacitance and voltage source network may be simplified using a Thevenin equivalent circuit to just one capacitor G 15 in series with one voltage source V _G 18 connecting the sphere 131 to earth as shown in fig 7. A better method to determine the measurand voltage V _RMS which negates the need to determine X 21, Y 22 and G 15 and only needs values for A 10 and B 11 and lends itself directly to the measurement of A 10 and B 11 as per the invention described herein is shown in fig 8. Here the currents flowing from the electrodes 4, 5 to the conducting surface 14 are measured by two current measuring devices 12 and 13 which, by definition, have effectively negligible impedance compared to the impedances of X 21, Y 22. The currents through X 21, Y 22 are therefore negligible and X 21, Y 22 can therefore be ignored when measuring the measurand voltage, i.e. VA 2 minus VB 3; this means fig 8 may be redrawn as an electrical schematic shown in fig 9a. Now, at any instant, the voltages around the dotted loop 16, according to Kirchov’s voltage law, must sum to zero, so the following equation can be written: Z _A . i _MA + VA - Z _B . i _MB - VB = 0 Eq. 1a Or: VA-VB = Z _B . i _MB - Z _A .i _MA Eq. 1b And in the specific case where VA 2, VB 3 are both sinusoidal at the same angular frequency ω _M this can be re-expressed as; VA-VB = i _MB /jω _M .B - i _MA /jω _M .A Eq. 1c Or: VA-VB = ( i _MB /B - i _MA /A)/ ω _M Eq. 1d The complex operator j has been omitted in eqn 1d since it applies to all terms. Z _A and Z _B are the impedances of capacitors A 10 and B 11 respectively at angular frequency ω _M , wherein suffix M denotes the measurand frequency when the measurand frequency is the same for both voltage sources VA 2, and VB 3. i _MA and i _MB are the instantaneous A.C. currents through capacitors A 10 and B 11 as measured by current measuring devices 12 and 13 at the measurand frequency M. Eq 1d expresses an instantaneous voltage which varies periodically during each measurand cycle; VA-VB can therefore be considered as a vector. A more useful time invariant quantity is the RMS voltage which, for a periodic number of discrete samples N, is defined by: Where i _MAn , and i _MBn are the instantaneous measurand currents through the capacitors A 10 and B 11 at the equispaced sampling intervals indexed by n. Equation 2a deals with a general periodic voltage waveform and involves squaring and square rooting in real time. If the voltage waveform is sinusoidal, as is essentially the case with grid mains at 50/60 Hz, then the RMS value can be obtained more simply by firstly calculating the Average Rectified Value, ARV (average of the absolute value of a wave form over one full period of the waveform) then scaling this by a form factor (K) which, for a sine wave, K = 1.1107. The form factor represents the ratio of the RMS value of a sinusoidal wave, to the A.R.V. of said wave. This is advantageous as calculating the A.R.V. is less computationally intensive and hence quicker in real-time as it only involves summations, divisions, and multiplications, but with no squaring and squarerooting. It should be noted that the complex factor j associated with the angular frequencies can be omitted in eqn 2b since it occurs in all the terms and therefore makes no difference to the magnitude of the result Thus the A.R.V. is given by: Therefore For completeness and in general VA 2, VB 3 may be non-sinusoidal and may be represented by two Fourier distributions of voltage sources as shown in fig 9b 201-206 i.e. VA = VA1 + VA2 + VA3 + …+VA _K or VA = ∑ _K VA _K Eq. 1e VB = VB ₁ + VB ₂ + VB ₃ + …+VB _F or VB = ∑ _F VB _F Eq. 1f Where K and F are the Fourier series indexes and due to Thevenin’s superposition theorem each of these sources will produce independent corresponding currents 207-212 i.e. i _MA = i _MA1 + i _MA2 + i _MA3 +…i _MAK or i _MA = ∑ _K i _MAK Eq. 1g i _MB = i _MB1 + i _MB2 + i _MB3 +…i _MBF or i _MB = ∑ _K i _MBF Eq. 1h Thus eq.1b in the gereral case can be written as; VA-VB =∑ _K VA _K - ∑ _F VB _F = ∑ _F Z _BF .i _MBF - ∑ _K Z _A K. i _MAK Eq. 1i Or; VA-VB =∑ _F i _MBF /jω _F .B - ∑ _K i _MAK /jω _K .A Eq. 1j If a compensation circuit is included in the current measuring device whereby the currents iK, iF are proportional to ω _K , ω _F respectively e.g. by using a single pole/zero differentiating circuit whereby i _K = i* _K .ω _K and i _F = i* _F .ω _F then eq 1j can be simplified and can be written; VA-VB = ∑ _F i* M _BF .ω _F /jω _F .B - ∑ _K i* M _AK .ω _K /jω _K .A Eq. 1k Or: VA-VB = ∑ _F i* _MBF / B - ∑ _K i* _MAK /.A Eq. 1m Where j has been omitted since it applies to all terms and can therefore be cancelled and for this general case we can write; Note the utility of using the A.R.V. cannot be used in this general case, it can only be used when the source voltages are pure sinusoids. From hereon for reasons of clarity the invention shall be described herein in relation to the preferred case where the voltage sources VA 2, VB 3 are of the same frequency and are thus phase locked to one another whereupon only eqns 1a-1d and eqns 2a-2c apply. If the sources VA 2, VB 3 are not of the same frequency then eqns 1a-1d and 1e- 1n still apply however now the RMS value must be calculated using eqn 2a; the relationship between the ARV and the RMS values does not apply in this case. The preceding discussion therein outlines that the voltage between two insulated conductors may be calculated utilising contactless measurement techniques by measuring the currents flowing through the capacitors A 10 and B 11 with a configuration as shown in fig 8. As can be seen from equations 2a, and 2c however, said method requires the capacitances A 10 and B 11 and the measurand frequency f _M , to be known. If the frequency is known then only calibration is required. If the frequency f _M is unknown then a method for determining the frequency f _M may be used such as frequency counting or Fourier analysis. As an alternative approach frequency compensation may be applied to flatten the transfer function in the passband, thereby negating any dependency of V _RMS on frequency. The prior art position is that a satisfactory method is not presently known for accurately determining the capacitances A 10 and B 11. It is thus an aim of the present invention to provide a method and device which can be utilised to determine the magnitudes of capacitances A 10 and B 11 such that these may be used in equations 2a or 2c as outlined above, for determination of the measurand voltage V _RMS between two sheathed conductors. Summary The present invention relates to a device for measuring the alternating voltage between first and second conductors connected to two alternating voltage sources without making galvanic contact with the conductors. The device comprising a first conducting element for location adjacent at least part of the first conductor; a second conducting element for location adjacent at least part of the second conductor; a first impedance measuring circuit; a second impedance measuring circuit; and a conducting surface in which the first and second conducting elements and first and second impedance measuring devices are housed. The first impedance measuring circuit is connected to the first conducting element; and the second impedance measuring circuit is connected to the second conducting element. The device comprising a central processing unit adapted to calculate a first coupling capacitance between the first conducting element and first conductor, and a second coupling capacitance between the second conducting element and the second conductor. The central processing unit adapted to calculate the alternating voltage between the first and second conductors based on the calculated first and second coupling capacitances. The present invention also relates to a method for measuring the alternating voltage between first and second conductors connected to two alternating voltage sources without making galvanic contact with the conductors. The method comprising the steps of positioning a first conducting element adjacent at least part of the first conductor; positioning a second conducting element adjacent at least part of the second conductor; providing a first input, via a first impedance measuring circuit, between the first conducting element and a conducting surface in which it is enclosed, wherein the first input is either a voltage or a current; providing a second input, via a second impedance measuring circuit, between the second conducting element and the conducting surface, in which it is enclosed, wherein the second input is either a voltage or a current; measuring, via the first impedance measuring circuit a first resultant network impedance; measuring, via the second impedance measuring circuit a second resultant network impedance; measuring a third resultant network impedance; calculating, based on the first, second, and third resultant network impedances , a first coupling capacitance between the first conducting element and first conductor, and a second coupling capacitance between the second conducting element and the second conductor; calculating, based on the first and second coupling capacitances, the voltage between the first and second conductors; and outputting the calculated value of the voltage between the first and second conductors. The various aspects of the present invention will now be described by way of example with reference to the accompanying drawings, as follows. Fig 1 A simple known arrangement for inaccurate non-contact measurement of a single sheathed cable Fig 2 A known arrangement for inaccurate non-contact measurement on two sheathed cables Fig 3 A known improved arrangement for non-contact measurement on two sheathed cables Fig 4 A more accurately represented arrangement for measurement on two sheathed cables than as shown in fig 3 by including capacitances X 21 and Y 22 Fig 5 Circuit diagram of fig 4 Fig 6 Body-to-earth capacitance model Fig 7 Thevenin’s equivalent circuit of fig 6 Fig 8 An arrangement similar to fig. 4 but including current measuring devices to conducting surface connections Fig 9a Circuit diagram of fig 8 Fig 9b General case of fig 9a where the measurand sources and measurand current detectors are frequency dependent Fig 10 A first embodiment of the invention whereby three modified impedance measuring circuits are included in the arrangement of fig 8 Figs 11 Simplified version of fig 10 when only modified impedance measuring circuit ZMODA 37 is measuring impedance Fig 12 Circuit diagram of fig 11 Figs 13 Simplified version of fig 10 when only modified impedance measuring circuit ZMODB(38) is measuring impedance Fig 14 Circuit diagram of fig 13 Figs 15 Simplified version of fig 10 when only modified impedance measuring circuit ZMODG 39 is measuring impedance Fig 16 Circuit diagram of fig 15 Fig 17 A second embodiment of the invention whereby two modified impedance measuring circuits are included in the arrangement of fig 8 Fig 18 A version of fig 17 when both impedance measuring circuits are active at the same time. Fig 19 An emulation of fig 10 whereby the modified impedance measuring circuits are voltage sourced. Fig 20 A simplified version of fig 19 with current measuring device i _RG omitted. Fig 21 A version of fig 20 when both voltage sources are active at the same time. Fig 22 Circuit diagram of fig 21 Fig 23 An emulation of the second embodiment whereby the impedance measuring circuits are voltage sourced. Fig 24 A simplified version of fig 23 whereby both voltage sources are active at the same time. Fig 25 The second embodiment with voltage sourced impedance measuring devices surrounded by a second outer conducting layer Fig 26 An emulation of the first embodiment with current sourced impedance measuring devices Fig 27 An emulation of the second embodiment with current sourced impedance measuring devices Fig 28 Flowchart for the iteration of the roots of a polynomial equation. Fig 29 Conceptual diagram of a meter embodying the invention attached to two cables Figs 30a – 30f Various types of clip on head of a meter embodying the invention Fig 31 Conceptual diagram of a meter embodying the invention Fig 32 Schematic diagram of a preferred embodiment of the invention Fig 33 Diagram showing the sampling of the two measurand voltages Fig 34 Flowchart for the operation of the preferred embodiment Fig 35 Signal diagram of the operation of the preferred embodiment The present invention provides a device comprising a network of impedance measuring devices and switches which are able to create three solvable simultaneous circuit equations with three unknown capacitances A 10, B 11, and G 15, and a method for providing the same. Capacitances A 10 and B 11 are then used in a standard method for determining the measurand voltage V _RMS between two sheathed conductors. Embodiments of the present invention, for utilising the methods discussed herein, may be seen in figs 10-28, as discussed in detail herein. The devices comprise a number of electrical components enclosed in an outer conducting surface 14. A plurality of devices and corresponding methods of the present invention for calculating the capacitances A 10 and B 11, and thus the voltage between the insulated conductors 5 and 6, are outlined herein. Embodiments of the invention as outlined herein relate to a device and associated method. In a first embodiment the basic circuit of fig 8 is augmented with the inclusion of three additional circuits, ZMODA 37, ZMODB 38 and ZMODG 39 as shown in fig 10. ZMODA 37 , ZMODB 38 and ZMODG 39 are modified impedance measuring circuits. They consist of an impedance measuring device Z _A 24, Z _B 26, Z _G 34 connected to one pole of a single pole double throw (SPDT) or changeover switch 57, 58, 59 whereby depending on the state of the switch they either measure the impedance of the circuit attached to the modified impedance measuring device, or provide a short circuit. The first embodiment of the invention works cyclically in 5 stages: In stage 1 ZMODB 38 and ZMODG 39 are shorted and ZMODA 37 measures the resultant network impedance, thereby fig 10 can be represented by fig 11 which, in turn, can be represented by fig 12. The effective capacitance of this network is given by: By using the standard relationship between effective capacitance and impedance whilst also ignoring the complex operator j since all the terms in the equations are reactive and we are exclusively concerned with amplitudes, this may be rewritten as: Rearranging for capacitance A, this may be rewritten as: In stage 2 ZMODA 37 and ZMODG 39 are shorted and ZMODB 38 measures impedance, thereby fig 10 can be represented by fig 13 which, in turn, can be represented by fig 14. The effective capacitance of the network is given by: By using the standard relationship between effective capacitance and impedance, this may be rewritten as: Rearranging for capacitance B, this may be rewritten as: In stage 3 ZMODA 37 and ZMODB 38 are shorted and ZMODG 39 measures impedance, thereby fig 10 can be represented by fig 15 which, in turn, can be represented by fig 16. The effective capacitance of the network is given by: Whereby H is the capacitance across ZMODG 39. By using the standard relationship between effective capacitance and impedance, this may be rewritten as: Rearranging for capacitance G, this may be rewritten as: In stage 4 the equations 5, 8, and 11 form a set of three non-linear simultaneous equations with three measurable variables Z _A 24, Z _B 26, Z _G 34 and three unknowns, capacitances A 10, B 11, and G 15 and, therefore, may be solved for A 10, B 11, and G 15. An analytical solution of these equations yields a polynomial equation. In general this cannot be solved analytically, but can be solved by using a numerical iteration to produce the roots which are the values of A 10, B 11, and G 15. An example of such an iteration is shown in fig 28 where: Block 140 seeds the variables A 10, B 11, G 15 with approximate values which allow the iteration to begin stably. Block 141 calculates values for A 10, B 11, G 15 according to the equations 5,8,11. On the first cycle it uses the seed values from block 140 and then iterates on subsequent passes. Block 142 may be a loop counter to allow a number of cycles, determined empirically, to be performed or can be a stability test to check whether successive values of A 10, B 11, and G 15 are appreciably the same. In stage 5 the values for A 10, and B 11 derived from the preceding stages are used in equations 2a or 2c to determine the measurand voltage V _RMS . After the first cycle which establishes values for A 10, and B 11, stage 5 may occur concurrently with the other stages since ZMODA 37 ,ZMODB 38 and ZMODG 39 by virtue of Thevenin’s principle of superposition present short circuits at frequency f _M at all times which is a prerequisite to measure the measurand voltage V _RMS using equations 2a or 2c. Note, as an alternative approach, in all of the methods of the embodiment the modified impedance measuring circuits ZMODA 37, ZMODB 38 and ZMODG 39 may be operated simultaneously whereby the impedance measuring devices Z _A 24, Z _B 26, Z _G 34 remain connected at all times. This approach requires high performance bandpass filters to be used in the impedance measuring devices. Furthermore careful consideration of the operating frequencies of these devices must be applied. In a second embodiment the method of the first embodiment shown in fig 10 is modified by omitting the modified impedance measuring circuit ZMODG 39 and is thus represented by fig 17. The second embodiment works cyclically in 5 stages: In stage 1 ZMODB 38 is shorted and ZMODA 37 measures impedance, thereby fig 17 can be represented by fig 11 which, in turn, can be represented by fig 12. The effective capacitance of the network is given by eqn 3 and by using the standard relationship between effective capacitance and impedance, this may be rewritten as eqn 4. This in turn can be rearranged for capacitance A, and may be rewritten as eqn 5: In stage 2 ZMODA 37 is shorted and ZMODB 38 measures impedance, thereby fig 17 can be represented by fig 13 which, in turn, can be represented as fig 14. The effective capacitance of the network is given by Eqn 6 and by using the standard relationship between effective capacitance and impedance, this may be rewritten as Eqn 7. This in turn can be rearranged for capacitance B, and may be rewritten as Eqn 8. In stage 3, both ZMODA 37 and ZMODB 38 measure impedance simultaneously as shown in fig 18 whereby if the amplitudes and the phases of the voltage or current sources in Z _A 24 and Z _B 26 are identical then the two impedance measuring devices Z _A 24 and Z _B 26 can be considered as one impedance measuring device Z _G 34 as is represented in fig 15, this is shown in a circuit diagram representation in fig 16. The effective capacitance of the network is given by Eqn 9 and by using the standard relationship between effective capacitance and impedance, this may be rewritten as Eqn 10. This in turn can be rearranged for capacitance G, and may be rewritten as Eqn 11. Stages 4 and 5 proceed in an identical fashion to stages 4 and 5 of the first embodiment. A third embodiment is a specific implementation of the first embodiment and is shown in fig 19 whereby the modified impedance measuring circuits of the first embodiment ZMODA 37, ZMODB 38 and ZMODG 39 are made using three modified voltage sourced circuits EMODA 40, EMODB 41 and EMODG 42. Each consists of an alternating voltage source E _A 23, E _B 25, E _G 33 which may be sinusoidal in form with a switchable bypass 57, 58, 59. Current measuring devices i _RA 27, i _RB 28, i _RG 29 are in series with the voltage sources E _A 23, E _B 25, E _G 33. Note that in the subsequent discussions unless indicated otherwise, values for alternating quantities are taken to be average rectified or A.R.V values or some other representation of the magnitude of the alternating value. It is convenient, in terms of simplifying the maths, but not essential, to make E _A 23, E _B 25,and E _G 33 the same value, designated by E. Furthermore, since stages 1, 2, and 3 run sequentially, it is acceptable and convenient to make the reference angular frequencies ω _A , ω _B , ω _G the same, designated by ω _R . In stage 1 with E _B 25,and E _G 33 shorted and E _A 23 and i _RA 27 measuring impedance, the effective capacitance of the network is given by eqn 3, therefore we can write: Therefore Therefore In stage 2 with E _A 23, and E _G 33 shorted and E _B 25 and i _RB 28 measuring impedance the effective capacitance of the network is given by eqn 6, therefore we can write: Therefore Therefore In stage 3 with E _A 23, and E _B 25 shorted and E _G 33 and i _RG 29 measuring impedance the effective capacitance of the network is given by eqn 9, therefore we can write: Therefore Therefore Eqns 14,17,20 can be solved iteratively for A 10, B 11 and G 15, and V _RMS determined using the methods of stage 4 and stage 5 of the first embodiment. The fourth embodiment is a modification of the third embodiment whereby the current measuring device i _RG 29 as shown in fig 19 is omitted, as shown in fig 20. Stages 1, and 2 are identical to the third embodiment. Stage 3 is different and can be represented by fig 21 which in turn can be represented by fig 22. From fig 22 i _RG 29 can be seen to be equivalent to a summation of i _RGA 43 and i _RGB 44, or: i _RG = i _RGA + i _RGB Eq. 21 Note that the term H 20 is no longer present in figs 20, 21, 22 since its presence has no effect on the voltage of E _G 33 and the current through H 20 does not contribute to the currents shown in eqn 21. Therefore with the identity of eqn 21 and the omission of H 20 eqn 20 becomes: Note that the suffix G in i _RGA 43, i _RGB 44 compared with i _RA 27, i _RB 28 is to indicate that i _RGA 43, i _RGB 44 are currents due, in stage 3, to the voltage source E _G 33 whereas i _RA 27, i _RB 28 are currents due to the voltage sources E _A 23, E _B 25 in stages 1 and 2. Note also that because stages 1, 2, and 3 occur sequentially then i _RG A 43 can be measured on the same physical device i _RA 27 and i _RG B 44 can be measured on the same physical device i _RB 28. Stage 4 now uses eqns. 14, 17, 22 as the equations in the iteration routine. Finally stage 5 is identical to stage 5 of the first embodiment. A fifth embodiment differs from the fourth embodiment in that the voltage source E _G 33 and its associated switch 59 are omitted, this is shown in fig 23. The fifth embodiment is therefore a specific implementation of the second embodiment. In stage 1 with E _B 25 shorted and E _A 23 and i _RA 27 measuring impedance the effective capacitance of the network is given by eqn 3 and A 10 is given by eqn 14. In stage 2 with E _A 23 shorted and E _B 25 and i _RB 28 measuring impedance the effective capacitance of the network is given by eqn 6 and B 11 is given by eqn 17. In stage 3 E _A 23 together with i _RG A 27 and E _B 25 together with i _RG B 28 measure impedance simultaneously as shown in fig 24 whereby if the amplitudes and the phases of the voltage sources E _A 23, E _B 27 are identical then they are equivalent to just one voltage source E _G 33 shown in fig 21. The analysis of stage 3 of the fifth embodiment from hereon is identical with the analysis of stage 3 of the fourth embodiment thereby arriving at the following equations (repeated): Stages 4 and 5 are identical with stages 4 and 5 of the fourth embodiment. A sixth embodiment utilises an additional conducting surface ACS 35 to measure the current i _RG 29 directly by including a current measuring device i _RGO 36 between the outer conducting surface 14 and the additional conducting surface 35. An example is shown in fig 25 as applied to the fifth embodiment, fig 23. The ACS 35 may be slightly larger than the outer conducting surface 14 and substantially surrounds the same, but is galvanically isolated by a minimal gap, thereby creating a capacitance H2 110 between the two conducting surfaces. Since the impedance of the current measuring device i _RGO 36 is considered to be much smaller than the impedance of the capacitance H2 110 then the value of H2 110 can be ignored. The method of the sixth embodiment can be applied to all of the previous embodiments. A seventh embodiment is a specific implementation of the first embodiment and is shown in fig 26 whereby the impedance measurements of the first embodiment ZMODA 37, ZMODB 38 and ZMODG 39 are made using three modified current sourced circuits IMODA 45, IMODB 46 and IMODG 47. Each consists of an A.C. current source I _SA 50, I _SB 51, I _SG 52 with a switchable bypass 57, 58, 59. A voltage measuring device Φ _A 53, Φ _B 54, Φ _G 55 measures the voltage across the current source. It is convenient in terms of simplifying the maths, but not essential, to make I _SA 50, ISB 51, ISG 52 the same value, designated by I. Furthermore, since stages 1, 2, and 3 run sequentially, it is convenient to make the reference frequencies ω _A , ω _B , ω _G the same, designated by ω _R . Therefore equations 5, 8, and 11 from the first embodiment become; The seventh embodiment works cyclically in five stages to derive the V _RMS . It should be noted that it is meaningless in the context of this embodiment to operate any of the stages simultaneously since simultaneous operation is only possible with voltage sources which have zero internal impedance, therefore all stages must be operated sequentially. An eighth embodiment is a specific implementation of the second embodiment and is shown in fig 27 whereby the impedance measurements of the second embodiment ZMODA 37, ZMODB 38 are made using two modified current sourced circuits IMODA 45, IMODB 46. Each consists of an A.C. current source I _SA 50, I _SB 51 with a switchable bypass 57, 58. A voltage measuring device Φ _A 53, Φ _B 54 measures the voltage across the current source. Eqns 23,24,25 are used to determine values for A 10, B 11, G 15 which are then used in stages 4,5 to determine the V _RMS . Preferred structural features of the invention As can be seen in fig 29, the device preferably comprises two clip-on units 101 and 102, which are connected, via two screened cables 103 and 104 respectively, to the main instrument housing 98, in which further electronics and the user interface 64 are housed. Each clip-on unit 101,102 may partly, or entirely, surround an electrode for positioning adjacent a respective one of the first and second conductors 6 and 7. The outer conducting surface is continuous across the main instrument housing 98, the screened cables 103,104, and the clip-on units 101,102, and is formed of a conductive material such as a conductive metal, and is preferably unbroken except for channels through which first and second conductors 6 and 7 may enter and exit. The outer conducting surface preferably comprises an aperture which provides a user interface 64. The user interface 64 may typically comprise an LCD display which may be housed behind a conducting mesh to reduce unwanted capacitive coupling between the internal electronics and physical earth/ground 1 and which maintains the screening across the aperture. The clip-on units 101,102 may typically be split with a hinge into an upper split head assembly 106 and a lower split head assembly 105 thereby allowing them to be clipped around the respective conductor 6 or 7. Within each clip-on unit 101,102 is an electrode 4, 5, that may have a variety of forms, which forms the coupling capacitance A 10, B 11 to a sheathed cable 6,7. Figs 30a-30d illustrate the clip-on unit 101, 102 in a split cylinder form where each electrode 4, 5 comprises an upper split cylinder 108 and lower split cylinder 107 which come together to enclose the inserted sheathed cable 6,7. Both sides of the split cylinder 108, 107 are connected together to increase the coupling capacitance. Figs 30e-30f illustrate the clip-on unit 101,102 when the electrode is a single planar element 109 positioned on either the inner upper side, or inner lower side of the clip-on unit 101, 102. This is a simpler, alternative design, in which there is no corresponding element above the sheathed cable 6,7. The single planar element provides a simpler arrangement, whilst the coupling split cylindrical electrode provides an arrangement with an increased capacitance coupling capacity. After the clip on unit 101,102 is clipped on to the conductor 6,7 the capacitance from the electrode to physical earth/ground 1 via the entry aperture of the conductor 6,7 is minimised by ensuring that there is no unnecessary gap between the aperture in the conducting surface 14 around the clip-on unit 101,102 and the conductor 6,7 that passes through the aperture. It is also ensured, through the layout of said features, that the conducting core of the conductor 6,7 has no significant coupling capacitance to any other parts of the device except to its associated electrode. Exemplary implementation of the present invention Herein an example electrical schematic of the fifth embodiment is shown in fig 32 and is an exemplary implementation of the circuit of fig 23. In this description of the fifth embodiment it will be assumed that the measurand voltages are sinusoidal such that when A 10, and B 11, are determined, eqn 2c can be used to determine the measurand voltage. If the measurand voltage V _RMS was non- sinusoidal then said determination would require eqn 2a to be used. Whilst the example electrical schematic is an exemplary implementation of the circuit of fig. 23, it will be appreciated that aside from the differing features of the devices of figs 19-25 the electrical components may be applied to any of the embodiments of the present invention. With reference to fig 32 there are three galvanically isolated regions that are each separately powered by battery or some other means: Head Assembly A 80 powered by local power supply A 74, Head Assembly B 81 powered by Local Power Supply B 75, Head assembly A being identical to Head assembly B, and the Chassis Assembly 8 powered by Local Power Supply 76. The elements in figs 19-25 are herein identified with respect to the example electrical schematic of fig. 32. The outer conducting surface 14 in figs 19-25 comprises all of the external surfaces of the device, this includes the external surfaces of the clip-on units 101-102, the external surface of the main unit 98 and the external surface of the connecting cables 103,104 which may be a conducting flexible braid mesh. In the exemplary implementation discussed herein, and referring to fig 32, head Assembly A 80 comprises an electrode 4 forming a capacitance A 10, with the sheathed cable 6 connected to a virtual earth op amp 9 with a feedback resistor R 56 which converts the raw current i _RAWA 96 from the electrode 4 into a raw voltage V _RAWA 92. The raw current and consequently the raw voltage are comprised of a superposition of the reference current and the measurand current such that; i _RAWA = i _RA + i _MA Eqn 26 V _RAWA = V _RA + V _MA = R(i _RA + i _MA ) Eqn 27 The electrode 4 also forms a capacitance X 21 with the outer conducting surface 14. A high pass filter 70 is connected to the output of the virtual earth op amp circuit. This has a passband centred on the reference frequency fR and separates the reference component V _RA 94 from the raw voltage V _RAWA 92. If the reference frequency is disabled as may be the case in stage 5 of the fifth embodiment then there is no need to incorporate an additional filter to separate the measurand source voltage V _MA at frequency f _M , from the raw voltage V _RAWA 92. Under these circumstances the raw voltage V _RAWA 92 is identical to the measurand voltage V _MA . Finally the reference component of the raw voltage V _RA 94 is decoupled from the head assembly A 80 into the chassis assembly 8 using a toroidal transformer 82. The raw voltage V _RAWA 92 which is the same as VMA when the reference voltage sources E _A 23, E _B 25 are bypassed as in stage 5, is connected directly into the chassis assembly 8. Head assembly B 81 operates in a similar way and comprises an electrode 5 forming a capacitance B 11, with the sheathed cable 7 connected to a virtual earth op amp 9 with a feedback resistor R 56 which converts the raw current i _RAWB 111 from the electrode 5 into a raw voltage V _RAWB 93. The raw current and consequently the raw voltage are comprised of a superposition of the reference current and the measurand current such that; i _RAWB = i _RB + i _MB Eqn 26a V _RAWB = V _RB + V _MB = R(i _RB + i _MB ) Eqn 27b The electrode 5 also forms a capacitance Y 22 with the outer conducting surface 14. A high pass filter 71 is connected to the output of the virtual earth op amp circuit. This has a passband centred on the reference frequency fR and separates the reference component V _RB 95 from the raw voltage V _RAWB 93. If the reference frequency is disabled as may be the case in stage 5 of the fifth embodiment then there is no need to incorporate an additional filter to separate the measurand source voltage V _MB at frequency f _M , from the raw voltage V _RAWB 93. Under these circumstances the raw voltage V _RAWB 93 is identical to the measurand voltage V _MB . Finally the reference component of the raw voltage V _RB 95 is decoupled from the head assembly B 81 into the chassis assembly 8 using a toroidal transformer 83. The raw voltage V _RAWB 93 which is the same as V _MB when the reference voltage sources E _A 23, E _B 25 are disabled as in stage 5, is connected directly into the chassis assembly 8. In the method outlined in the fifth embodiment the independent variables are the currents i _RA 27, i _RB 28, i _RG 29. By using the virtual earth op amp circuits in the head assemblies A 80,B 81, these currents are converted into the corresponding voltages V _RA 94, V _RB 95, V _RG 49, and therefore the equations 14, 17, 22 discussed in the second, fourth and fifth embodiments to determine the capacitances A 10, B 11 G 15 can be modified to become; By virtue of the current to voltage conversion using the virtual earth op amp circuits in the head assemblies A 80, B 81, the eqns. 2a and 2c become: There are many various possible morphological arrangements of the components in both the head assemblies 80, 81 and the chassis assembly 8. Fig 29 and fig 31 show two such arrangements which differ in regard to the aspect ratio width/length of the connection region 77 between the clip-on assemblies 101,102 and the main housing 98. For the convenience of diagrammatic representation of the exemplary implementation of the present invention, fig 32 has a more suitable representation and is an electronic shematic representation of the inside of fig 31. The coupling capacitances X 21, Y 22, appear in eqns 29, 30, 31 as offsets to the independent variable terms V _RA /(R.E.ω _R ), V _RB /(R.E.ω _R ), V _RG /(R.E.ω _R ). It is therefore good practice to minimise X 21, Y 22, thereby proportionally reducing any error in the measurement thereof. For this reason, it is expedient to place the inverting input terminal of the preamplifier as close to the electrode as possible, thereby minimising the length of wire able to form the coupling capacitances X 21, Y 22, with the conducting surface 14. This can be seen in fig 32 by the location of the op amps being close to the coupling electrodes whilst the remaining electrical components of the Head assemblies HAA 80 and HAB 81 are located in the larger section of the main housing, adjacent the Chassis Assembly 8. Referring to fig 32, the Chassis Assembly 8 consists of a central processing unit 63, Analog to Digital (ATOD) interfaces 84-87, a local power supply LPSG 76, a sine wave generator 65, changeover or single pole dual throw electronic analogue switching devices ASA 88, ASB 89 and a user interface 64. The central processing unit 63 controls the timing of the data acquisition through the AtoD devices 84- 87, the timing of the switching of ASA 88, ASB 89, the calculation of A 10, B 11, using the methods of the present invention, and subsequently performs calculation to determine the measurand voltage V _RMS using eqn. 33. The result may then be output to the user interface. Resistors R 56 in HAA 80 and HAB 81 are of matched value and selected to ensure that the dynamic range of the respective operational amplifier is largely utilised whilst always remaining in the linear region for the highest anticipated measurand voltages 2,3. Referring to fig 32, the operation of the exemplary implementation of the present invention is as follows: Within the chassis assembly 8 there is a free running sine wave generator 65 connected to the changeover switches ASA 88, ASB 89. These can be switched in any combination to two outputs 90, 91 to produce the reference signals E _A 23, E _B 25 which are connected to local ground A 72 and local ground B 73 respectively. Each of ASA 88, ASB 89 is configured such that when the outputs 90, 91 are not connected to the sine wave generator 65, then they are connected to the Chassis Ground 19. Note the chassis ground 19 is connected at all times to the conducting surface 14 in this exemplary implementation of the present invention. The CPU 63 controls the changeover, dual throw switches 88, 89 via the logic connections GA 60, GB 61. Within the chassis assembly 8 the AtoD converters ADC2 85 and ADC4 87 digitise the reference voltages V _RA 94, V _RB 95, corresponding to the reference currents i _RA 27, i _RB 28. Also within the chassis assembly 8 when there are no reference voltages present, i.e. in stage 5 when E _A 23 = 0, E _B 25 = 0, then the AtoD converters ADC1 84 and ADC3 86 simultaneously digitise the raw voltages V _RAWA 92 and V _RAWB 93 from HAA 80 and HAB 81 which under these circumstances are identical to V _MA , V _MB to determine the measurand voltage V _RMS . The independent variables in eqns 29, 30, 31 are V _RA 94, V _RB 95 , V _RG 49. These are scalar quantities and represent the absolute magnitude of the alternating voltages associated with V _RA 94, V _RB 95, V _RG 49. There are many standard methods to determine the absolute magnitude of an alternating voltage. The method used in this exemplary implementation of the present invention is to sample the alternating reference voltage, preferably, for at least several hundred cycles, at a sampling frequency fS which is assyncronous with the reference frequency fR thereby minimising beat patterns. The AtoD converters used in this embodiment are preferably bipolar, with a 2’s complement representation of negative values. By taking the 2’s complement of the negative representation, rectification is achieved. A simple algorithm then averages all of the positive values over the acquisition period to produce an average rectified value or ARV which is a representative magnitude of the alternating voltage. It should be noted that A to D conversion on the measurand voltages V _MA , V _MB , are, by contrast, instantaneous measurements which have a signed value. A flowchart for the preferred operation of the exemplary implementation of the present invention is shown in fig 34 and as a complement a signal state diagram is shown in fig 35. The flowchart forms a cyclic loop and comprises the following stages: Firstly X 21 and Y 22 are determined as follows: Inspection of eqns 29 and 30 shows that if there is no sheathed cable present then A 10 = 0 and B 11 = 0. Eqns. 29 and 30 then reduce to the following; X = V _RA /(R.E.ω _R ) (A=0) Eqn 34 Y = V _RB /(R.E.ω _R ) (B=0) Eqn 35 Thus X 21 and Y 22 can easily be measured and remain invariant. In stage 1 150 as shown in fig 35, with GA = 1, and GB = 0, E _A 23 is therefore active with E _B 25 shorted. The voltage V _RA 94 is sampled many times to determine the ARV of V _RA 94. In stage 2 151 with GB=1, and GA=0, E _B 25 is therefore active with E _A 23 shorted. The voltage V _RB 95 is sampled many times to determine the ARV of V _RB 95. In stage 3 152 with GA=1, GB=1 E _A 23 and E _B 25 are both active and therefore according to the theory of the fifth embodiment and by virtue of being in parallel the two sources are equivalent to the one voltage source E _G in embodiments 1,3,4. Furthermore according to the theory of the fifth embodiment i _RG is a summation of i _RA and i _RB ; To distinguish the reference currents under these circumstances an additional G is added to their suffixes thus becoming i _RGA and i _RGB . Or: i _RG = i _RGA + i _RGB Eqn 36 Now by virtue of the current to voltage conversion of the op amps 9 in the head assemblies 80,81, V _RG = V _RGA + V _RGB = R(i _RG A + i _RG B) Eqn 37 Both V _RGA 68 and V _RGB 69 are sampled many times to determine the respective ARV’s of V _RGA 68 and V _RGB 69. The ARV V _RG 49 is calculated as a summation of the ARV ‘s of V _RGA 68 and V _RGB 69. In stage 4 153 an iteration is performed to determine the roots A 10, B 11, G 15 of the polynomial equation which is formed if the equation set 29, 30, 31 is rationalised to just one equation by substitution. The iteration algorithm is initially seeded with values for A 10, B 11, G 15, then eqns. 29, 30, 31 are calculated sequentially to determine iterated values for A 10, B 11, G 15. The iteration starts with pre-determined values for X 22, Y 23, R 56, E (nominally unity) and ω together with the independent variable ARV values V _RA 94, V _RB 95, V _RG 49, determined in stages 150, 151, 152. The cycle is allowed to execute for nominally 100 times whereupon values for A 10, B 11, G 15 will be produced. If successive sets of values vary to greater than 1% then the iteration has not converged, an error message should be generated, and the polynomial equation deemed to be unsolvable. Below is a piece of code suitable for performing the iteration: A = 100: B = 100: G = 100: counter = 0 label: counter = counter+1 If (counter <100 jump to label) Continue: Comment: Values are generated for A 10, B 11, G 15 In stage 5 154 the measurand voltage V _RMS is determined according to equations 32 or 33. Firstly GA 60, GB 61 are cleared (i.e. set to 0) thus E _A 23 and E _B 25 are both shorted. This ensures there is no component at the reference frequency f _R mixed in with the raw signals V _RAWA 92 and V _RAWB 93. The raw signals V _RAWA 92 and V _RAWB 93 are thus identical to V _MA and V _MB which are themselves proportional to i _MA 12 and i _MB 13. V _MA and V _MB are sampled simultaneously by ADC1 84 and ADC3 86 at a sampling frequency f _S = 1/τ where τ is the sampling interval time as shown in fig 33, wherein fS can take a range of values but must not be a simple multiple of the measurand frequency f _M to avoid beat patterns. If the measurand voltage V _RMS is sinusoidal then these simultaneous values are then used in Eqn. 33, together with the values determined for A 10 and B 11 from stages 1-4 to determine the voltage between conductors 6 and 7. Finally a scaling or calibration factor may be applied to calibrate the output. Below is a piece of code suitable for performing this calculation: Sum=0 For n=1 to N { Sample V _RAWA 92, V _RAWB 93 simultaneously at intervals n,n+1,n+2… according to fig 33 Sum=Sum+(ABS(V _MBn /B-V _MAn /A))/R } V _ARV = Sum/Nω _M V _RMS = 1.1107 x V _ARV Calibrate and output V _RMS to a user interface By utilising the present invention, the capacitances A 10, B 11 between the electrodes 4 and 5 and the insulated conductors 6 and 7 respectively, can be calculated. Therein, said capacitances may be utilised in equation 33 to calculate the voltage between the two insulated conductors. It should be noted from eqns 1b,1j,1k, that (VA-VB) is a vector quantity. If the vector current A _MEASURAND flowing through the first and second conductors 6,7 can be determined then the instantaneous power P _INSTANT in the measurand circuit is given by: P _INSTANT = (VA-VB).A _MEASURAND And the RMS power is given by Thus if capacitances A 10, B 11 can be determined then eqn. 1k suggests that the vector voltage can be determined. Combining this with a known current clip-on probe which can yield a vector current then eqn. 38 allows a non-contact power meter to be realised in accordance with a preferred embodiment of the present invention.