Title:
CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, INFORMATION PROCESSING DEVICE AND CONTROL METHOD
Document Type and Number:
WIPO Patent Application WO/2018/163730
Kind Code:
A1
Abstract:
[Problem] To provide a control circuit capable of, through a simple configuration, not only suppressing an increase in power consumption but also preventing writing errors and the destruction of a memory element. [Solution] The present invention provides a control circuit which, for a memory cell having a source line, a bit line, a transistor provided between the source line and the bit line and turned on or off by a potential of a word line, and a memory element connected in series with the transistor, outputs a signal for discharging electric charges accumulated in the source line and the bit line in response to the activation of the word line, and outputs a signal for bringing the source line and the bit line into a floating state before the start of writing or reading.
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Inventors:
TEZUKA HIROYUKI (JP)
Application Number:
PCT/JP2018/005037
Publication Date:
September 13, 2018
Filing Date:
February 14, 2018
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
G11C11/16
Foreign References:
| JP2014191835A | 2014-10-06 | |||
| JP2013251035A | 2013-12-12 |
Attorney, Agent or Firm:
KAMEYA, Yoshiaki et al. (JP)
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