Title:
CONTROL DEVICE AND CONTROL METHOD
Document Type and Number:
WIPO Patent Application WO/2021/205949
Kind Code:
A1
Abstract:
Excessive current at the time of initial charge of a capacitor for assisting with the supply of power is satisfactorily prevented. The present invention comprises a control unit that controls a power system having a configuration in which a power supply is connected to a load via a power supply line, a capacitor for assisting with the supply of power is connected to the power supply line via a first switch, and the capacitor is charged, while current limits are applied, by intermittent driving of a switching power supply that uses the power supply as input. The control unit performs control so that the output voltage of the switching power supply is the same as the voltage of the power supply line, controls the first switch from off to on after charging of the capacitor is completed, and connects the capacitor to the power supply line.
More Like This:
WO/2023/068750 | WIRELESS POWER TRANSMITTING APPARATUS AND CONTROL METHOD THEREOF |
WO/1996/030990 | CURRENT LIMITING DEVICE |
Inventors:
KAI TOSHIMITSU (JP)
Application Number:
PCT/JP2021/013732
Publication Date:
October 14, 2021
Filing Date:
March 30, 2021
Export Citation:
Assignee:
SONY GROUP CORP (JP)
International Classes:
H02H9/02; H02J1/00; H02J7/34
Foreign References:
JP2005065459A | 2005-03-10 | |||
JP2018182936A | 2018-11-15 | |||
JP2014135825A | 2014-07-24 | |||
JP2008118828A | 2008-05-22 |
Attorney, Agent or Firm:
MIYATA, Masaaki et al. (JP)
Download PDF:
Previous Patent: TILT SENSOR AND DATA ACQURING DEVICE
Next Patent: METHOD FOR MEASURING FORMATION OF DIC DEFECTS IN SILICON WAFER, AND POLISHING METHOD
Next Patent: METHOD FOR MEASURING FORMATION OF DIC DEFECTS IN SILICON WAFER, AND POLISHING METHOD