CONTROL OF A VOLTAGE SOURCE CONVERTER TECHNICAL FIELD The present disclosure generally relates to the control of a voltage source converter and in particular to a method, computer program and computer program product for determining a synchronizing angle for a processing plane comprising a first axis and a second axis, a controller for controlling a voltage source converter as well as to a converting arrangement comprising a voltage source converter and such a controller. BACKGROUND Vector current control (VCC) and power-synchronization control (PSC) are two different methods for controlling a grid-connected voltage-source converter. VCC is inherited from vector control of ac motor drives, whereas PSC mimics the dynamics of a synchronous machine. They are respectively considered to be grid-following and grid-forming schemes, suited respectively for connection to strong and weak grids. Over the last few years, the two schemes have been robustified so that they now both work well regardless of the grid strength. Interestingly, the modifications and additions that constitute the robustification have the effect that VCC and PSC converge to the same scheme. This has been discussed by L. Harnefors et al. in the paper “A Universal Controller for Grid-Connected Voltage-Source Converters”, IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL.9, NO.5, OCTOBER 2021. To summarize the findings in this paper, when recast as a VCC-like structure, PSC comprises three control blocks, as shown in fig.1, 2 and 3. As can be seen in fig.1, there is an ac voltage control block 10 and this ac voltage control block 10 operates in a processing plane having a first and a second axis. In the paper the processing plane is the dq-plane where the d- axis is the first axis and the q-axis is the second axis. For this reason, the ac voltage control block 10 comprises a d-axis control branch comprising a first subtracting element 12 in which an ac voltage error that is the difference between a voltage reference Eref and an ac voltage Ed on an ac side of the voltage source converter is calculated, which error is thus an error for a voltage Ed along a d-axis of the dq-plane. Furthermore, the dq-plane is oriented along the voltage at this ac side. The voltage error E _ref – E _d is supplied to a first low pass filter 14 that filters the ac voltage error using a transfer function H(s). The low pass filtered voltage error is then supplied to a first input of a first adding element 20. The low pass filtered voltage error is also supplied to a first amplifying element 16 that amplifies the ac voltage error with a gain of α _a . The amplified and filtered ac voltage error is then supplied to a first integrating element 18 that performs integration and supplies the result to a second input of the first adding element 20. The sum of the low pass filtered ac voltage error and the amplified and integrated low pass filtered ac voltage error is then supplied to a second amplifying element 22, which multiplies the sum with a gain Ga for obtaining a processed ac voltage error ^ _^ ^{^^^} , which is also an ac-voltage-controlling current reference. The processed ac voltage error ^ _^ ^{^^^} is then supplied to a second adding element 24 to be added to an active-power-producing current reference ^^^^ ^ . The sum of the processed ac voltage error ^ _^ ^{^^^} and the active-power- producing current reference ^^^^ ^ is then supplied to a saturating element 38. The ac voltage control block 10 also comprises a q-axis control branch in which a second subtracting element 26 subtracts an ac voltage Eq along the q- axis from zero and thereby provides a negative q-axis ac voltage -E _q as an output. The negative q-axis ac voltage -E _q is then supplied to a second low pass filter 28 that filters the negative q-axis ac voltage -E _q using the transfer function H(s). The low pass filtered negative q-axis ac voltage is then supplied to a first input of a third adding element 34. The low pass filtered negative q-axis ac voltage is also supplied to a third amplifying element 30 that amplifies it with the gain of αa. The amplified and filtered negative q-axis ac voltage is then supplied to a second integrating element 32 that performs integration and supplies the result to a second input of the third adding element 34. The sum of the low pass filtered negative q-axis ac voltage and the amplified and integrated low pass filtered negative q-axis ac voltage is then supplied to a fourth amplifying element 36, which multiplies the sum with the gain G _a . The multiplied sum is then supplied to the saturating element 38. The sum of the processed ac voltage error ^ _^ ^{^^^} and the active-power- producing current reference ^^^^ ^ reference forms a d-axis component of a current reference and the multiplied sum of the low pass filtered negative q- axis ac voltage and the amplified and integrated low pass filtered negative q- axis ac voltage forms a q-axis component of the current reference. The saturating element 38 saturates the current reference through limiting the magnitude of it to a maximum allowed value while retaining the angle between the d-axis component and the q-axis component. A saturated current reference is then output as the d-axis current reference ^^^^ ^ and q-axis current reference ^ _^ ^{^^^} to be used by a current control block. The current control block 40 is shown in fig.2 and comprises a first, a second and a third parallel branch. In the first branch, the ac voltage E at the ac side of the voltage source converter is low pass filtered in a third low pass filter 42 using the transfer function H(s), and the low pass filtered voltage is supplied to a first input terminal of a fourth adding element 50. The second branch comprises a third subtracting element 44 in which a current error that is the difference between a current reference iref and an ac current i at the ac side of the voltage source converter is formed. The ac current error iref – i is supplied to a fifth amplifying element 46 that amplifies the ac current error with a gain of Ra. The amplified ac current error is then supplied to a second input of the fourth adding element 50. In the third branch the ac current i is amplified with a gain of jω1L by a sixth amplifying element 48 and the amplified ac current is supplied to a third input terminal of the fourth adding element 50. The fourth adding element 50 then provides the sum of the inputs as a reference voltage v _ref to be used for controlling the voltage source converter. As can be seen in fig.3, there is a synchronization control block that is made up of a synchronization angle determining branch SADB 52. The branch comprises a fourth subtracting element 54 that forms an active power control error between the power P at the ac side of the voltage source converter and a power reference P _ref . The active power control error P _ref – P is supplied to a processing element 56 in which the active power control error is low pass filtered and amplified with a gain K _p in order to obtain an angular frequency ωp, which is supplied to a fifth adding element 58 in which it is added to a nominal angular grid frequency ω1 and the sum is integrated in a third integrating element 60 and provided as a synchronization angle θ for the dq- plane. In the control blocks discussed above, E = E _d + jE _q and i = i _d + ji _q are respectively the dq-plane space vectors for an ac side voltage, which may be the voltage at a point-of-common-coupling (PCC) and the converter output current i at the same point, vref is the reference for the converter voltage, L is an inductance between the voltage source converter and the PCC, ω ₁ is a nominal angular frequency, and θ is the dq-plane angle or synchronization angle used in conversions to and from the dq-plane. The dq-plane is thus oriented along the voltage at the point of common coupling PCC as opposed to being oriented perpendicular to this voltage. The ac voltage control block 10 supplies the reference i _ref = to the current control block 40. It is saturated (SAT) to the maximum permissible modulus, when needed to prevent overcurrent. (However, SAT is normally transparent, i.e., not effectuated.) The ac voltage control block 10 comprises PI controllers, formed by the amplifying and integrating elements 16, 18, 22 30, 32 and 36, in the d-axis control branch and q-axis control branch that form d-to-d and q-to-q signal paths, cascaded with the low-pass filters 14 and 28, giving the transfer function: ^^^ ^ _{^ ^} ^ ^(^) (1) For PSC correspondence, the P gain is selected as Ga = 1/Ra, where Ra is the proportional or P gain of the current control block 40, and integrating or I gain as α _a = 0.1–0.2 p.u., where p.u. stands for per unit. The power control that results from PSC is different to a conventional power controller, which couples from d to q. In the d-axis control branch, the active-power-producing current component reference is added, where Pref is the active-power reference, Eref is the reference for E, κ = 3/(2K ² ), and K is the space-vector scaling constant. The current control block 40 has a proportional or P term, a dq decoupler, and a PCC-voltage feedforward through low-pass filter H(s), which can, but does not have to, be identical to that in the ac voltage control block 10. An integrating or I part can be added if needed, as can resonant parts for negative-sequence and harmonics control. The following selections are recommended: where αc is the desired closed-loop bandwidth. The ac voltage control block 10 and current control block 30 together form a feedback loop that regulates the ac voltage error down to zero in steady state. The synchronization control block in fig.3 is a power control block which emulates the swing equation of a synchronous machine, computing the dq- plane angle based on the active-power control error Pref − P. Kp(s) = Kp (i.e., a P controller) yields response without a virtual inertia. Virtual inertia can be added by cascading a low-pass filter with the P gain. PI control eliminates the inherent frequency droop, which otherwise would give a static error P _ref − P when the angular grid frequency ωg deviates from ω1. The following gain selection recommendation is given in the paper: In the paper, PSC as given in Figure 1, 2 and 3 is compared experimentally to a VCC scheme, designed with PSC as guideline. The current control block is identical, but a conventional voltage controller is used as a voltage control block. The synchronisation employs a phase-locked loop (PLL) instead of a power controller. The schemes perform similarly, but yet PSC as compared to VCC has a distinct benefit and drawback. - At transients, there are smaller deviations in E _q , owing to the usage of a power controller instead of a PLL for synchronization. This tends to give a step response in P that is free of overshoot. – For high current and high gain Ra, there is a tendency to ringing. This eventually turns into instability as R _a is increased further. An upper limit on Ra thus must be observed, which is not the case for VCC. The destabilizing effect is caused by the power controller. The use of PLL (phase locked loop) for determining a synchronization angle is for instance described by Meersman et al. in “Overview of PLL methods for distributed generation units”, 45th International Universities Power Engineering Conference UPEC2010. Harnefors et al. in “Generic PLL-Based Grid-Forming Control”, IEEE Transactions on Power Electronics, February 2022 in turn discloses a PLL that is combined with a power controller as well as an ac voltage controller (AVC) that provides a current reference to a current controller (CC). Aspects of the present invention are concerned with providing a controller in which such ringing is handled. SUMMARY Aspects of the present invention are thus concerned with the problem of handling ringing in a current provided by a voltage source converter. This object is according to a first aspect achieved through a method of determining a synchronizing angle for a processing plane comprising a first axis and a second axis, the method being performed in a controller that controls a voltage source converter having an alternating current, ac, side and a direct current, dc, side, the method comprising: processing an ac voltage error, which ac voltage error is the error of a voltage component along the first axis of an ac voltage at the ac side of the voltage source converter to thereby obtain a processed ac voltage error, the processing of the ac voltage error being processing in a feedback loop used to control the ac voltage at the ac side of the voltage source converter, and determining the synchronization angle for the processing plane based on the processed ac voltage error. The object is according to a second aspect achieved through a controller for controlling a voltage source converter having an alternating current, ac, side and a direct current, dc, side, the controller being configured to: process an ac voltage error, which ac voltage error is the error of a voltage component along a first axis of an ac voltage at the ac side of the voltage source converter, where the first axis is an axis of a processing plane also comprising a second axis, the processing of the ac voltage error being processing in a feedback loop used to control the ac voltage at the ac side of the voltage source converter, and determine a synchronization angle for the processing plane based on the processed ac voltage error. The object is according to a third aspect achieved by a converting arrangement comprising a voltage source converter and a controller according to the third aspect. The object is according to a fourth aspect achieved by a computer program for determining a synchronizing angle for a processing plane comprising a first axis and a second axis, which synchronization angle is used by a controller comprising a processor and configured to control a voltage source converter, the computer program being configured to implement the operation according to the first aspect when being operated on by the processor of the controller. The object is according to a fifth aspect achieved by a computer program product for determining a synchronizing angle for a processing plane comprising a first axis and a second axis, the computer program product comprising a data carrier with the computer program according to the fourth aspect. The processing of the ac voltage error in the feedback loop may comprise regulating the ac voltage error to zero. The processing plane may be a plane in which processing of electrical ac quantities is performed, such as the quantities current and voltage. The processing plane may be the dq-plane. The first axis may in this case be the d- axis and the second axis may be the q-axis. The processing plane may additionally be oriented along the voltage at ac side of the voltage source converter. Thereby it is also not oriented perpendicular to the voltage at the ac side of the converter. The ac voltage error may be formed as a difference between the voltage component along the first axis and a reference voltage, which reference voltage is separate from zero. Thereby, the reference voltage is also different from zero. The controller may be a power synchronization controller that is mapped onto a vector current control structure. The voltage at the ac side of the voltage source converter may additionally be the voltage at a point of common coupling. According to a variation of the first aspect, the determining of the synchronization angle comprises applying proportional control on the processed ac voltage error for obtaining an angular velocity. According to a corresponding variation of the second aspect, the controller, when being configured to determine the synchronization angle, is configured to apply proportional control on the processed ac voltage error for obtaining an angular velocity. The application of proportional control may involve amplifying the processed ac voltage error with a gain. The proportional control may also be combined with low pass filtering of the processed ac voltage error. According to another variation of the first aspect, the determining of the synchronization angle comprises combining the obtained angular velocity with a nominal angular velocity. According to a corresponding variation of the second aspect, the controller, when being configured to determine the synchronization angle, is configured to combine the obtained angular velocity with a nominal angular velocity. The nominal angular velocity may be a nominal angular velocity at the ac side of the voltage source converter. The voltage source converter may be connected to an ac grid. In this case the nominal angular velocity may the nominal angular velocity of the ac grid. The combining of the angular velocities may comprise forming a sum of the nominal angular velocity and the determined angular velocity. According to yet another variation of the first aspect, the determining of the synchronization angle comprises integrating the combined angular velocities in order to obtain the synchronization angle. According to a corresponding variation of the second aspect, the controller, when being configured to determine the synchronization angle, is configured to integrate the combined angular velocities in order to obtain the synchronization angle. The method may furthermore be considered to be a method of controlling the voltage source converter. In this case the method according to the first aspect may further comprise obtaining the voltage at the ac side of the voltage source converter, determining a reference voltage for the voltage source converter, where the ac side voltage is obtained in a control plane and the reference voltage is determined in the processing plane, transforming the ac side voltage from the control plane to the processing plane using the synchronization angle and transforming the reference voltage from the processing plane to the control plane using the synchronization angle. The controller according to the second aspect may according to a corresponding variation be further configured to obtain the voltage at the ac side of the voltage source converter, determine a reference voltage for the voltage source converter, where the ac side voltage is obtained in a control plane and the reference voltage is determined in the processing plane, transform the ac side voltage from the control plane to the processing plane using the synchronization angle and transform the reference voltage from the processing plane to the control plane using the synchronization angle. The control plane is a plane in which the electrical quantities are measured or obtained and in which the control is performed, such as the abc-plane. According to yet another variation of the first aspect, the processing of the ac voltage error comprises applying proportional and integrating control on the ac voltage error. According to a corresponding variation of the second aspect, the controller, when being configured to process the ac voltage error, is further configured to apply proportional and integrating control on the ac voltage error. The processing of the ac voltage error may additionally comprise low-pass filtering the ac voltage error. According to a further variation of the first aspect, the method further comprises determining a current reference based on the processed ac voltage error. According to a corresponding variation of the second aspect, the controller is further configured to determine a current reference based on the processed ac voltage error. According to yet another variation of the first aspect, the determining of the current reference comprises determining a component of the current reference along the first axis based on the processed ac voltage error. According to a corresponding variation of the second aspect, the controller, when being configured to determine a current reference, is configured to determine a component of the current reference along the first axis based on the processed ac voltage error. The determining of the component of the current reference along the first axis may in this case be made as a combination of the processed ac voltage error with an active-power-producing current reference, where the combination may be formed as a sum of the processed ac voltage error and the active-power producing current reference. According to another variation of the first aspect, the determining of the current reference comprises determining a component of the current reference along the second axis based on a processed voltage component of the ac voltage along the second axis. According to a corresponding variation of the second aspect, the controller, when being configured to determine a current reference is configured to determine a component of the current reference along the second axis based on a processed voltage component of the ac voltage along the second axis. The component of the current reference along the second axis may be determined based on a processed voltage component of the ac voltage along the second axis, which processed voltage component may be obtained through applying proportional and integrating control on the voltage component of the ac voltage along the second axis. It is here possible that the ac voltage along the second axis is also low-pass filtered. The determining of the current reference may additionally comprise saturating the current reference, e.g. the limiting of the magnitude of the current reference to a maximum allowed value, while retaining the phase angle. The method according to the first aspect may additionally comprise processing the current reference for obtaining the control voltage used to control the voltage source converter. In a similar manner the controller according to the second aspect may be additionally configured to process the current reference for obtaining the control voltage used to control the voltage source converter. The processing of the current reference may comprise forming a current error between the current reference and an ac current on the ac side of the voltage source converter and processing the current error for obtaining the reference voltage. The processing of the current reference may in this case comprise performing proportional control of the current error, e.g. amplifying the current error with a gain, and combining the processed current error with an amplified ac side current and the ac side voltage, possibly after the ac side voltage has been low pass filtered, where the result of the combination is the reference voltage for the voltage source converter. The combination may additionally be obtained as a sum of the processed current error, the amplified ac side current and the ac side voltage. The applying of proportional control on the processed ac voltage error may involve amplifying the processed ac voltage error with a gain K _E , which gain KE may be a modification of a gain KP used to amplify a power error in a power control block, which power control block may emulate a swing equation of a synchronous machine. The gain K _E used in the proportional control of the processed ac voltage error may additionally be based on a voltage reference Eref used for forming the ac voltage error. The gain K _E used in the proportional control of the processed ac voltage error may also be based on a gain Ga used when applying proportional and integrating control on the ac voltage error. The gain K _E used in the proportional control of the processed ac voltage error may furthermore be based on a proportional gain Ra used in the proportional control of the current error. The gain K _E used in the proportional control of the processed ac voltage error may also be based on a space vector scaling constant κ. The gain K _E used in the proportional control of the processed ac voltage error may additionally be set The controller may additionally be considered to comprise an ac voltage control block comprising a control branch for the first axis and a control branch for the second axis, and a synchronization angle determining branch for determining a synchronizing angle of a processing plane formed by the first axis and the second axis, where the synchronization angle control branch is connected to the control branch for the first axis. In this case the voltage control block may also be seen as comprising a proportional and integrating control entity, where the input of the synchronization angle control branch is connected to the output of the proportional and integrating control entity. Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the element, apparatus, component, means, etc.” are to be interpreted openly as referring to at least one instance of the “element, apparatus, component, means, etc.”, unless explicitly stated otherwise. BRIEF DESCRIPTION OF THE DRAWINGS The specific embodiments of the inventive concept will now be described, by way of example, with reference to the accompanying drawings, in which: Fig.1 schematically shows the known ac voltage control block in a PSC controller implemented in a VCC structure, Fig 2 schematically shows the known current control block in the PSC controller implemented in the VCC structure, Fig.3 schematically shows the known synchronization control block in the PSC controller implemented in the VCC structure, Fig.4 schematically shows a voltage source converter together with a controller implementing aspects of the present disclosure, Fig, 5 schematically shows a first variation of an ac voltage control block of the controller to which ac voltage control block a synchronization angle determining branch is connected, Fig 6 schematically shows a number of method steps in a method for determining a synchronizing angle for a processing plane, Fig.7 schematically shows a number of method steps in the control of the voltage source converter where the synchronization angle is used, Fig.8 schematically shows one way in which the controller may be realized, and Fig.9 schematically shows a data carrier with computer program code, in the form of a CD-ROM disc, for implementing the functionality of the controller. DETAILED DESCRIPTION Aspects of the present disclosure are related to the paper “A Universal Controller for Grid-Connected Voltage-Source Converters” by L. Harnefors et al., IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL.9, NO.5, OCTOBER 2021. The contents of this paper are herein incorporated by reference. The inventive concept will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplifying embodiments are shown. The inventive concept may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided by way of example so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. Like numbers refer to like elements throughout the description. Fig.4 shows an example of a converting arrangement 62 comprising a voltage source converter 64 and a controller 70 for the voltage source converter 64. The voltage source converter 64 has a direct current, dc, side and an alternating current, ac, side, where the voltage source converter provides an ac voltage v ^s on the ac side. On the ac side the voltage source converter 64 is also connected to a point of common coupling PCC via an inductance L. At this point of common coupling PCC an ac current i ^s and an ac voltage E ^s are measured, which current and voltage are provided in a control plane. The voltage and current may be measured using measurement transformers. The measured ac voltage E ^s is converted from the control-plane to the processing plane by a first plane converting unit 66 and the measured ac current i ^s is converted from the control plane to the processing plane by a second plane converting unit 68. The processing plane may additionally be oriented along the voltage at the point of common coupling PCC. The processing plane current i and voltage E are then supplied to the controller 70. The controller 70 also receives a voltage reference Eref for the voltage at the point of common coupling PCC and supplies a reference voltage v _ref in the processing plane for the converter output voltage. The converter reference voltage vref is sent to a third plane converting unit 72 which converts the reference voltage from the processing plane to the control plane before being supplied to the voltage source converter 64 as ^ ^ ^ _^^ . The controller 70 also supplies the plane converting units 66, 68 and 72 with a synchronization angle θ to be used in the plane conversions. The reference voltage ^ ^ ^ _^^ is then used in a known way to control the ac side voltage v ^s of the voltage source converter 64. The processing plane is a plane in which processing of electrical ac quantities is performed, such as the quantities current and voltage. In the example described here, the processing plane is the dq-plane, where the first axis is the d-axis and the second axis is the q-axis. The control plane is in turn the plane in which the electrical quantities are detected and the control is being performed. This plane is in this case the abc-plane. The plane converting units 66, 68 and 72 are here shown separate from the controller 70. It should however be realized that they may just as well be a part of the controller 70. The controller 70 is a power synchronization controller mapped onto a vector current control structure. As was mentioned earlier, aspects of the present disclosure are concerned with limiting ringing in the output current of a voltage source converter. How this may be done will now be described in some more detail together with an analysis of the known controller shown in fig.1, 2 and 3 and the previously described equations (1) – (4). Ringing occurs for high current levels. This influence will now be quantified. The active output power P at the PCC is given by ^ = ^^^{^^ ^∗ } (5) Linearization of (5) by introducing E = Eref + ∆E and i = i0 + ∆i yields P = ^Re ^{ (^ _^^^ + Δ^)(^ _^ + Δ^) ^∗} ≈ ^Re ^{ ^ _^^^ ^∗ ^ + ^∗ ^Δ^ + ^ _^^^ Δ^ ^} = ^^^{^ ∗ ^ _^^ ^ − ^ _^ (^ _^^^ − ^)} (6) In the paper it is shown that the closed-loop system which results from the control scheme in fig.1 is given by If (3) is followed, then = ^ _^ (^)^ _^^^ + ^^ _^^^ ^ _^ (^)(^ _^^^ − ^ _^ ) − ^^^ ^{ ^ ^∗ ^ ⁽ ^ _^^^ − ^ ^)} (10) In turn, the power control error, which is the input to the synchronization angle controller, is given as ^ _^^^ − ^ = ^[ 1 − ^ _^ (^)]^ _^^^ − ^^ _^^^ ^ _^ (^)(^ _^^^ − ^ _^ ⁾ + ^^^ ^{ ^ ^∗ ^ ⁽ ^ _^^^ − ^ ^)} (11) Here, the first term, [1−Gc(s)]Pref, determines the immediate response to a reference change. G _c (s) has a high bandwidth. Therefore, the influence of the first term can normally be neglected. The second term is dominant and shows the influence of a deviation of Ed from its reference. The third term is also a function of the voltage control error, but unlike the second term it is dependent on the current operating point. This term is the root cause of the ringing. To eliminate the influence of i0, the input Pref − P to the power controller is not computed via (5), but using the linearized expression (11), where the first and third terms are dropped, giving From Figure 1 we have that so it follows that (12) can be obtained by the following scaling of ^ _^ ^{^^^} : ^ ^{^} ^ _^ ^{^} (14) where the gain simplifies to −κE _ref for the PSC-corresponding selection G _a = 1/Ra. Finally, Fig.3 yields (15) denoted K _E (s). The resulting scheme is illustrated in Fig.5 where a voltage error E _ref − E _d is used for synchronization via the processed ac-voltage error ^ _^ ^{^^^} . As can be seen in fig.5, there is an ac voltage control block 10 with the same realization as in fig.1. There is thus a control branch for the first axis, here realized as a d-axis control branch, which control branch comprises the first subtracting element 12 in which a voltage error at the PCC that is the difference between a voltage reference Eref and an ac voltage E along the d-axis of the dq-plane is calculated, where the voltage reference E _ref is separate from or different than zero, i.e. Eref ≠ 0. The voltage error Eref – Ed is supplied to the first low pass filter 14 that filters the ac voltage error using the transfer function H(s). The low pass filtered voltage error is supplied to the first input of the first adding element 20 as well as to the first amplifying element 16 that amplifies the ac voltage error with the gain α _a . The amplified and filtered ac voltage error is supplied to the first integrating element 18 that performs integration and supplies the result to the second input of the first adding element 20. The sum of the low pass filtered ac voltage error and the amplified and integrated low pass filtered ac voltage error is also here supplied to the second amplifying element 22, which multiplies the sum with a gain Ga for obtaining the processed ac voltage error ^ _^ ^{^^^} , which processed ac voltage error is supplied to the second adding element 24 to be added to the active-power- producing current reference ^^^^ ^ . The sum of the processed ac voltage error ^ ^{^^^} and the active-power-producing current reference ^^^ ^ ^ _^ is then supplied to the saturating element 38. As in fig.1, the ac voltage control block 10 also comprises a control branch for the second axis, here realized as a q-axis control branch. In the q-axis control branch the second subtracting element 26 subtracts the ac voltage E _q of the PCC along the q-axis from zero and thereby provides a negative q-axis ac voltage -E _q as an output. The negative q-axis ac voltage -E _q is supplied to the second low pass filter 28 that filters the negative q-axis ac voltage -Eq using the transfer function H(s). The low-pass filtered negative q-axis ac voltage is supplied to the first input of the third adding element 34. The low pass filtered negative q-axis ac voltage is also supplied to the third amplifying element 30 that amplifies the ac voltage error with the gain αa. The amplified and filtered negative q-axis ac voltage is supplied to the second integrating element 32 that performs integration and supplies the result to the second input of the third adding element 34. The sum of the low pass filtered negative q-axis ac voltage and the amplified and integrated low pass filtered negative q-axis ac voltage is then supplied to the fourth amplifying element 36, which multiplies the sum with the gain G _a . The multiplied sum is then supplied to the saturating element 38, which in turn provides the d-axis current reference ^^^^ ^ and q-axis current reference ^ _^ ^{^^^} as output. The first amplifying element 16, the first integrating element 18, the first adding element 20 and the second amplifying element 22 may here be considered to form a first proportional and integrating control entity having an output formed by the output of the second amplifying element 22, while the third amplifying element 30, the second integrating element 32, the third adding element 34 and the fourth amplifying element 36 may be considered to form a second proportional and integrating control entity having an output formed by the output of the fourth amplifying element 36. As opposed to the converter depicted in fig.1 - 3, the synchronization angle determining branch SADB 52’ is not provided in a separate control block that operates on the power error. Instead, it is connected to the d-axis control branch of the ac voltage control block 10. It is more particularly connected to the output of the second amplifying element 22. Thereby the input of the synchronization angle determining branch 52’ is also connected to the output of the first proportional and integrating control entity. The branch 52’ comprises a processing element 74 in which the processed ac voltage error ^ _^ ^{^^^} output by the second amplifying element 22 is low pass filtered and amplified with a filter (gain) -K _E (s) in order to obtain the angular frequency ωp. The angular frequency ωp is supplied to a combining element in the form of a sixth adding element 76 in which the angular frequency is combined with a nominal angular frequency ω ₁ at the ac side of the voltage source converter. If the voltage source converter is connected to an ac grid, the nominal angular frequency ω ₁ may be the nominal angular frequency of the ac grid. The combining may additionally comprise the forming of a sum of the two angular frequencies. The combined angular frequencies, or the sum, is then integrated in a fourth integrating element 78 and provided as the synchronization angle θ for the dq-plane. It can also be seen that instead of operating on a power error between the power P at the point of common coupling PCC and a power reference Pref, the synchronization angle determining branch 52’ operates on an amplified sum forming the processed ac voltage error ^ _^ ^{^^^} , which sum is the sum of the low pass filtered ac voltage error Eref – Ed and the amplified and integrated low pass filtered ac voltage error E _ref – E _d . The controller 70 also comprises a current control block that operates on a current error formed through a difference between the ac current at the point of common coupling PCC and the current reference. This current control block may have the realization shown in fig.2. The operation of the controller 70 and then especially of the synchronization angle determining branch 52’ may then be the following, as depicted in the flow chart of fig.6. The method may involve processing, in the d-axis control branch of the ac voltage control block 10, an ac voltage error E _ref – E _d at the ac side of the voltage source converter, step 80, which may be at the point of common coupling PCC and which processing may involve low pass filtering the ac voltage error Eref – Ed and performing proportional and integrating control on the possibly low-pass filtered ac voltage error to thereby obtain a processed ac voltage error ^ _^ ^{^^^} , which processed ac voltage error may be an ac-voltage-controlling current reference and where the ac voltage error Eref – Ed may be an ac voltage error related to a voltage Ed along the d-axis of the dq-plane. Thereafter, the method comprises processing the processed ac voltage error, in the synchronization angle determining branch 52’. According to aspects of the present disclosure the processing more particularly comprises applying proportional control K _E on the processed ac voltage error for obtaining an angular velocity ωp, step 82. Here it is possible that the processing also comprises low pass filtering of the processed ac voltage error. From the discussion made in relation to equation (15) it can be seen that the proportional control applied on the processed ac voltage error involves amplifying the processed ac voltage error with the gain K _E , which gain K _E may be a modification of the gain KP used to amplify the power error in the power control block formed by the previously mentioned synchronization control block, which power control block emulates a swing equation of a synchronous machine. The gain KE used in the proportional control of the processed ac voltage error is in the present case based on the voltage reference E _ref used for forming the ac voltage error. The gain KE used in the proportional control of the processed ac voltage error is here also be based on the gain G _a used when applying proportional and integrating control on the ac voltage error. The gain KE used in the proportional control of the processed ac voltage error is here furthermore based on the proportional gain R _a used in the proportional control of the current error. Finally, the gain KE used in the proportional control of the processed ac voltage error is in the present example also based on a space vector scaling constant κ. The gain KE used in the proportional control of the processed ac voltage error is in the present example additionally set The processing may additionally comprise combining, in the synchronization angle determining branch 52’, the obtained angular velocity ωp with the nominal angular velocity ω ₁ , step 84. The combining may in this case be the forming of a sum of the nominal angular velocity ω1 and the determined angular velocity ω _p . It is more particularly possible that the synchronization angle θ is determined as the integrated combined angular velocities. This may be done through integrating the sum ω ₁ + ω _p in order to obtain the synchronization angle θ, step 86. The method may furthermore comprise determining, in the ac voltage control block 10, a component of a current reference along the first axis, a d-axis component, based on the processed ac voltage error ^ _^ ^{^^^} . The d-axis component ^^^^ ^ of the current reference may more particularly be determined as a sum of the processed ac voltage error ^ _^ ^{^^^} and the active-power- producing current reference ^^^^ . The determined d-axis c ^^^ ^ omponent ^ _^ of the current reference is then supplied to the current control block. The method may also comprise determining, in the ac voltage control block 10, a q-axis current component ^ _^ ^{^^^} of the current reference based on a processed negative ac side voltage along the q-axis, which processing may comprise low pass filtering the negative ac voltage -E _q along the q-axis and performing proportional and integrating control on the possibly low-pass filtered negative q-axis ac voltage -E _q , in order to obtain the q-axis component of the current reference. The method may further comprise supplying the q-axis component ^ _^ ^{^^^} of the current reference to the current control block. It is furthermore possible that the current reference is saturated before being supplied to the current control block. This may involve limiting the magnitude of the current reference to a maximum allowed value, while retaining the phase angle. The angle between the d- and q-components is thus retained while the vector length is reduced. The method may additionally comprise providing, in the current control block, a current error made up of a difference between the current reference i _ref and the ac side current i and processing the current error for obtaining the voltage reference for the voltage source converter, where the current reference is made up of the d-axis component of the current reference and the q-axis component of the current reference. The processing may furthermore comprise performing proportional control of the current error through amplifying it with a gain and combing the amplified current error with the amplified current and the ac side voltage, possibly after being low pass filtered, where the result of the combination is a voltage reference v _ref for the voltage source converter in the dq-plane. The combination may here be a sum of the amplified current error, the amplified current and the ac side voltage. The synchronization angle is typically used in the control of the voltage source converter. It is more particularly used in transformations between the abc- and dq-planes. Therefore, the method may additionally comprise, as is shown in the flow chart of fig.7, obtaining the ac voltage E ^s and the ac current i ^s at the ac side of the voltage source converter 64, step 88, where the ac side voltage and current are obtained in the control plane, transforming the obtained ac side voltage and current from the control plane into the processing plane using the determined synchronization angle θ, step 90, determining the reference voltage vref in the processing plane based on the transformed voltage and current E and i, step 92, transforming the reference voltage from the processing plane to the control plane using the synchronization angle θ, step 94, and applying the transformed reference voltage ^ ^ ^ _^^ in the voltage source converter, step 96. It can thereby be seen that the ac voltage control block 10 and the current control block 40 together form a feedback loop and this feedback loop is used to control the ac voltage at the ac side of the voltage source converter 64. The feedback loop is thus used in the control of the voltage source converter 64 to provide a desired ac voltage at the ac side of the converter 64, and in this example at the point of common coupling PCC. Furthermore, in the feedback loop the ac voltage error is regulated down to zero, which regulating is a regulating in steady state. Through determining the synchronization angle in the above-mentioned way, ringing at high current levels is avoided or mitigated. Also power overshoot may be avoided or mitigated. Furthermore, it can be seen that processing is simplified as there is no need for measuring the power or operating on the power error. The amount of processing is also reduced as there is no need for a separate block that determines the synchronization angle, such as the synchronization control block of fig.3 or a PLL (phase locked loop). As can be seen in fig.8, the controller 70 may be realized as a processor PR 100 and a memory M 102 comprising a computer program CP 104 that implements the controller functionality. The computer program 104 may thereby have computer program code, software code or computer instructions implementing the controller functionality. The processor 100 thereby implements the controller functionality when running the computer program 104. It should be realized that the processor may be a central processing unit (CPU), multiprocessor, a digital signal processor (DSP) or the processor of an application specific integrated circuit (ASIC), field programmable gate array (FPGA) etc., capable of implementing the controller functionality. The memory 102 may for example be a random access memory (RAM), a read- only memory (ROM), an erasable programmable read-only memory (EPROM), or an electrically erasable programmable read-only memory (EEPROM). The computer program may also be realized as a computer program product comprising a data carrier with the computer program. One such data carrier 108 or non-volatile storage medium, in the form of CD Rom disk comprising the computer program 104 is schematically shown in fig.9. It should be understood that the data carrier is not limited to CD ROM disks, but may as an example be realized as a USB (Universal Serial Bus) memory or a Flash memory instead. The inventive concept has mainly been described above with reference to a few examples. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the inventive concept, as defined by the appended claims. The processing plane was exemplified by the dq-plane. It should however be realized that the processing may be carried out in another plane, such as for instance the αβ-plane. It should also be realized that one or more of the low pass filters may be omitted. It is also possible that the provision of a current reference is made without saturation.