The invention relates to a controllable amplifier circuit, and to a receiver comprising a receiving stage and an amplifying stage.

Examples of such a receiver are audio receivers like mobile phones, video receivers like televisions, audio players, video players, audio recorders, video recorders, modems etc.

A prior art controllable amplifier circuit is known from US 5,216, 383, which discloses a field effect transistor tetrode comprising an amplifying field effect transistor and a controlling field effect transistor in a cascode arrangement.

The known controllable amplifier circuit is disadvantageous, inter alia, due to introducing gain dependent distortion during gain control.

It is an object of the invention, inter alia, to provide a controllable amplifier circuit which introduces less gain dependent distortion during gain control.

A further object of the invention is, inter alia, to provide a receiver which comprises a receiving stage and an amplifying stage comprising a controllable amplifier circuit which introduces less gain dependent distortion during gain control.

The controllable amplifier circuit according to the invention comprises a field effect transistor comprising a control electrode constituting an input; and a bipolar transistor comprising a control electrode constituting a control input and a first main electrode constituting an output and a second main electrode coupled to a first main electrode of the field effect transistor.

By providing the controllable amplifier circuit with an amplifying field effect transistor of which a gate constitutes the input and with a controlling bipolar transistor of which a basis constitutes the control input and of which a collector constitutes the output and

of which an emitter is coupled to a drain of the amplifying field effect transistor, directly, or indirectly via one or more passive and/or active elements, the controllable amplifier circuit introduces less gain dependent distortion during gain control, compared to the prior art controllable amplifier circuit. This can be derived as follows.

In the prior art controllable amplifier circuit comprising two field effect transistors, without gain reduction, the overall gain of the controllable amplifier circuit is determined by a trans-conductance of the amplifying field effect transistor, with a product of a drain-source impedance of the amplifying field effect transistor and a trans-conductance of the controlling field effect transistor being much larger than one. Gain reduction is accomplished by controlling a control voltage at the gate of the controlling field effect transistor such that a drain-source voltage of the amplifying field effect transistor is decreased. Once the amplifying field effect transistor has arrived in"deep-triode" (the drain- source voltage is then much smaller than the gate-source voltage), the drain-source impedance of the amplifying field effect transistor becomes responsible for some gain reduction, since the before-mentioned product is no longer much larger than one. As a result, a relatively large increase in distortion occurs.

The amplifying field effect transistor is mainly responsible for this distortion.

Over most of the gain control range, an output characteristic being a drain-source current as a function of the drain-source voltage is much more non-linear than a forward transfer function being the drain-source current as a function of the gate-source voltage. To reduce the influence of the output characteristic, a lower terminating impedance should be applied to the drain of the amplifying field effect transistor. By replacing the prior art controlling field effect transistor by the controlling bipolar transistor, a higher trans-conductance and thus a lower terminating impedance is applied to the drain of the amplifying field effect transistor, and as a result, some of the gain dependent distortion is reduced.

A first embodiment of the controllable amplifier circuit according to the invention is defined by the field effect transistor comprising a metal oxide semiconductor transistor, with the bipolar transistor comprising a bipolar junction transistor. This is a low cost and therefore advantageous combination.

A second embodiment of the controllable amplifier circuit according to the invention is defined by a bias current of the field effect transistor being larger than a bias current of the bipolar transistor. The output noise at the output highly depends on the trans- conductance of the controlling bipolar transistor. By making the bias current which flows through the controlling bipolar transistor smaller than the bias current which flows through

the amplifying field effect transistor, the influence of the trans-conductance of the controlling bipolar transistor is reduced, and the noise behavior is improved, with the distortion still being favorable compared to dual gate topology in which both field effect transistors are biased with equal bias currents.

A third embodiment of the controllable amplifier circuit according to the invention is defined by further comprising a first bias current source coupled to the first main electrode of the field effect transistor for generating a first bias current, and a second bias current source coupled to the first main electrode of the bipolar transistor for generating a second bias current. This is a low cost and therefore advantageous embodiment for improving the noise behavior.

A fourth embodiment of the controllable amplifier circuit according to the invention is defined by further comprising a buffer transistor situated between the bipolar transistor and the field effect transistor. The buffer transistor for example comprises a buffering bipolar transistor of which a first main electrode (collector) is coupled to the second main electrode (emitter) of the controlling bipolar transistor and of which a second main electrode (emitter) is coupled to the first main electrode (drain) of the amplifying field effect transistor and of which a control electrode (base) is coupled, possibly via a differential voltage source, to the control electrode (base) of the controlling bipolar transistor. This buffering bipolar transistor provides a high impedance to the emitter of the controlling bipolar transistor, which further reduces the distortion. Both bipolar transistors form a cascode arrangement of a higher bipolar transistor and a lower bipolar transistor, which lower bipolar transistor is connected to the amplifying field effect transistor. The lower bipolar transistor may receive the control voltage and represents a controlling transistor, with the base of the higher bipolar transistor being coupled to the base of the lower bipolar transistor via the differential voltage source, and with the higher bipolar transistor running in tandem. A value of the differential voltage originating from the differential voltage source sets the collector-emitter"headroom"of the lower bipolar transistor.

A fifth embodiment of the controllable amplifier circuit according to the invention is defined by further comprising a further bipolar transistor forming, together with the bipolar transistor, a current divider. By introducing the further bipolar transistor of which a control electrode (base) is coupled to a bias voltage source and of which a second main electrode (emitter) is coupled to the second main electrode (emitter) of the controlling bipolar transistor, once the control voltage at the basis of the controlling bipolar transistor drops below a bias voltage originating from the bias voltage source, a part of the current which

flows through the amplifying field effect transistor will be supplied via the further bipolar transistor. As a result, the voltage at the drain of the amplifying field effect transistor will not further change. Below a certain value of the control voltage, the drain-source of the amplifying field effect transistor will remain constant (and hence the operating point and the amount of gain of the amplifying field effect transistor), and gain reduction is taken over by the bipolar current divider. The load impedance for the amplifying field effect transistor can now remain intact for the entire gain control range, which results in an improved intermodulation behavior.

A sixth embodiment of the controllable amplifier circuit according to the invention is defined by further comprising a buffer transistor situated between the bipolar transistors and the field effect transistor. The buffer transistor for example comprises a buffering bipolar transistor of which a first main electrode (collector) is coupled to the second main electrodes (emitters) of both bipolar transistors and of which a second main electrode (emitter) is coupled to the first main electrode (drain) of the amplifying field effect transistor and of which a control electrode (base) is coupled, via a first differential voltage source, to the control electrode (base) of the controlling bipolar transistor. In this case, the control electrode (base) of the further bipolar transistor is coupled to a serial circuit of a bias voltage source and a second differential voltage source, with both differential voltage sources generating substantially the same differential voltage. This buffering bipolar transistor provides a high impedance to the emitter of the controlling bipolar transistor, which further reduces the distortion. The bipolar transistors form a cascode arrangement of two (left and right) higher (current dividing) bipolar transistors and a lower bipolar transistor, which lower bipolar transistor is connected to the amplifying field effect transistor. The lower bipolar transistor may receive the control voltage and represents a controlling transistor, with the base of the right higher bipolar transistor being coupled to the base of the lower bipolar transistor via the differential voltage source. A value of the differential voltage originating from the differential voltage source sets the collector-emitter"headroom"of the lower bipolar transistor.

A seventh embodiment of the controllable amplifier circuit according to the invention is defined by further comprising a further bipolar transistor, and a further field effect transistor comprising a control electrode constituting a further input, with a control electrode of the further bipolar transistor constituting the control input and a first main electrode of the further bipolar transistor constituting a further output and a second main electrode of the further bipolar transistor being coupled to a first main electrode of the further

field effect transistor. This is a balanced and therefore advantageous embodiment. Usually, this embodiment also comprises four yet further bipolar transistors of which the bases are coupled to each other and to a diode and a current source, with emitters of two first yet further bipolar transistors being coupled to each other and to the emitter of the further bipolar transistor, with emitters of two second yet further bipolar transistors being coupled to each other and to the emitter of the bipolar transistor, with collectors of one of the first and one of the second yet further bipolar transistors being coupled to each other and to the collector of the further bipolar transistor, and with collectors of the other one of the first and the other one of the second yet further bipolar transistors being coupled to each other and to the collector of the bipolar transistor.

An eighth embodiment of the controllable amplifier circuit according to the invention is defined by bias currents of the field effect transistors being larger than bias currents of the bipolar transistors. The output noise at the outputs highly depends on the trans-conductance of the controlling bipolar transistors. By making the bias currents which flow through the controlling bipolar transistors smaller than the bias currents which flow through the amplifying field effect transistors, the influence of the trans-conductance of the controlling bipolar transistors is reduced, and the noise behaviour is improved, with the distortion still being favourable compared to dual gate topology in which all field effect transistors are biased with equal bias currents.

A ninth embodiment of the controllable amplifier circuit according to the invention is defined by further comprising two first bias current sources coupled to the first main electrodes of the field effect transistors for generating first bias currents, and two second bias current sources coupled to the first main electrodes of the bipolar transistors for generating second bias currents. This is a low cost and therefore advantageous embodiment for improving the noise behaviour.

A tenth embodiment of the controllable amplifier circuit according to the invention is defined by further comprising an operational transconductance amplifier coupled to the output and the further output. Such an operational transconductance amplifier forms an advantageous load for the controllable amplifier circuit. Of course, generally, such an operational transconductance amplifier can be combined with any previous embodiment described.

A receiver according to the invention comprises a receiving stage for receiving an input signal and for generating an information signal, and an amplifying stage comprising

a controllable amplifier circuit for amplifying the information signal, which controllable amplifier circuit comprises: a field effect transistor comprising a control electrode constituting an input; and a bipolar transistor comprising a control electrode constituting a control input and a first main electrode constituting an output and a second main electrode coupled to a first main electrode of the field effect transistor.

Embodiments of the receiver according to the invention correspond with the embodiments of the controllable amplifier circuit according to the invention.

The invention is based upon an insight, inter alia, that in a prior art controllable amplifier circuits an output characteristic being a drain-source current as a function of the drain-source voltage is much more non-linear than a forward transfer function being the drain-source current as a function of the gate-source voltage, and is based upon a basic idea, inter alia, that the influence of the output characteristic can be reduced by applying a lower terminating impedance to the drain of the amplifying field effect transistor, which can be done by replacing the prior art controlling field effect transistor by the controlling bipolar transistor.

The invention solves the problem, inter alia, of providing a controllable amplifier circuit which introduces less gain dependent distortion during gain control, and is advantageous, inter alia, in that the controllable amplifier circuit has a more linear behaviour.

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments (s) described hereinafter.

In the drawings: Fig. 1 shows in block diagram form a controllable amplifier circuit according to the invention ; Fig. 2 shows in block diagram form a balanced controllable amplifier circuit according to the invention ; and Fig. 3 shows a receiver according to the invention.

The controllable amplifier circuit 1 according to the invention shown in Fig. 1 comprises a field effect transistor 3 comprising a control electrode (gate) constituting an input of the controllable amplifier circuit 1. This input is coupled to ground via a resistor 14 and a bias voltage source 15 for generating a bias voltage, and is coupled to ground via a capacitor 13, a source resistor 20 and an information voltage source 19 for generating an information signal. The controllable amplifier circuit 1 according to the invention further comprises a current divider including a bipolar transistor 5 and a further bipolar transistor 6.

A first main electrode (collector) of further bipolar transistor 6 is coupled to a voltage supply, and a second main electrode (emitter) of further bipolar transistor 6 is coupled to the second main electrode (emitter) of bipolar transistor 5 and is coupled to a first main electrode (collector) of a buffer transistor 11 and is coupled via a first bias current source 7 to the voltage supply. A first main electrode (drain) of field effect transistor 3 is coupled to a second main electrode (emitter) of buffer transistor 11, and a second main electrode (source) of field effect transistor 3 is coupled to ground. A first main electrode of bipolar transistor 4 is coupled via a second bias current source 9 to the voltage supply and is coupled to ground via a capacitor 21 and an load resistor 22. A control electrode (base) of further bipolar transistor 6 is coupled to ground via a differential voltage source 23 for generating a differential voltage and via a bias voltage source 24 for generating a bias voltage. A control electrode (base) of bipolar transistor 5 is coupled to a control electrode (base) of buffer transistor 11 via a differential voltage source 25 for generating a differential voltage and is coupled to ground via a control voltage source 26 for generating a control voltage. Field effect transistor 3 is an amplifying field effect transistor, like for example a metal oxide semiconductor transistor, and bipolar transistor 5 is a controlling bipolar transistor, like for example a bipolar junction transistor.

In a prior art controllable amplifier circuit comprising two field effect transistors in a cascode arrangement, without gain reduction, the overall gain of the controllable amplifier circuit is determined by a trans-conductance of the amplifying field effect transistor, with a product of a drain-source impedance of the amplifying field effect transistor and a trans-conductance of the controlling field effect transistor being much larger than one. Gain reduction is accomplished by controlling a control voltage at the gate of the controlling field effect transistor such that a drain-source voltage of the amplifying field effect transistor is decreased. Once the amplifying field effect transistor has arrived in"deep- triode" (the drain-source voltage is then much smaller than the gate-source voltage), the drain-source impedance of the amplifying field effect transistor becomes responsible for

some gain reduction, since the before-mentioned product is no longer much larger than one.

As a result, a relatively large increase in distortion occurs.

The amplifying field effect transistor 3 is mainly responsible for this distortion. Over most of the gain control range, an output characteristic being a drain-source current as a function of the drain-source voltage is much more non-linear than a forward transfer function being the drain-source current as a function of the gate-source voltage. To reduce the influence of the output characteristic, a lower terminating impedance should be applied to the drain of the amplifying field effect transistor 3. By replacing the prior art controlling field effect transistor by the controlling bipolar transistor 5, a higher trans- conductance and thus a lower terminating impedance is applied to the drain of the amplifying field effect transistor 3, and as a result, some of the gain dependent distortion is reduced.

The first bias current source 7 generates a first bias current, and the second bias current source 9 generates a second bias current. The output noise at the output (load resistor 22) highly depends on the trans-conductance of the controlling bipolar transistor 5.

By making a bias current (the second bias current) which flows through the controlling bipolar transistor 5 smaller than a bias current (the sum of the first and second bias current, at maximum gain) which flows through the amplifying field effect transistor 3, the influence of the trans-conductance of the controlling bipolar transistor 5 is reduced, and the noise behaviour is improved.

The buffer transistor 11 for example comprises a buffering bipolar transistor and provides a high impedance to the emitter of the controlling bipolar transistor 5, which further reduces the distortion.

By introducing the current divider including the bipolar transistor 5 and the further bipolar transistor 6, compared to a situation with a single bipolar transistor 5, the intermodulation behaviour of the controllable amplifier circuit 1 is improved: Once the control voltage originating from control voltage source 26 at the basis of the controlling bipolar transistor 5 drops below the sum of the bias voltage originating from the bias voltage source 24 and the differential voltage originating from the differential voltage source 23, a part of the current which flows through the amplifying field effect transistor 3 will be supplied via the further bipolar transistor 6 and be taken out of bipolar transistor 5. As a result, gain reduction is established by means of current division, while the gain of the amplifying field effect transistor 3 remains the same because the voltage at the drain of the amplifying field effect transistor 3 will not further change. The load impedance for the amplifying field effect transistor 3 can now remain intact for the entire gain control range,

which results in an improved intermodulation behaviour. The differential voltages originating from the differential voltage sources 23 and 25 are given an identical value and determine the collector-emitter voltage of buffering bipolar transistor 11, which buffering bipolar transistor 11, together with bipolar transistors 5 and 6, may be considered to be controlling bipolar transistors. In fact, transistor 11 controls the gain of the amplifying field effect transistor 3 (over the drain-source DC voltage of amplifying field effect transistor 3) while transistors 5 and 6 form a current divider to re-route signal away to the supply terminal. Both run in tandem and'take-over point'can be set via a value of the bias voltage originating from the bias voltage source 24. The bias voltage originating from the bias voltage source 24 is for example equal to a sum of a basis-emitter voltage of further bipolar transistor 6 and a drain- source voltage of field effect transistor 3, to get an optimal intermodulation distortion.

The balanced controllable amplifier circuit 2 according to the invention shown in Fig. 2 comprises a field effect transistor 3 comprising a control electrode (gate) constituting an input of the balanced controllable amplifier circuit 2. This input is coupled to ground via a resistor 14 and a bias voltage source 15 for generating a bias voltage, and is coupled to a capacitor 13 for receiving an information signal. The balanced controllable amplifier circuit 2 according to the invention further comprises a further field effect transistor 4 comprising a control electrode (gate) constituting a further input of the balanced controllable amplifier circuit 2. This further input is coupled to ground via a resistor 17 and a bias voltage source 18 for generating a bias voltage, and is coupled to a capacitor 16 for receiving the information signal. Second main electrodes (sources) of field effect transistor 3 and further field effect transistor 4 are coupled to ground, and first main electrodes (drains) are coupled to first bias current sources 7,8 and are coupled to second main electrodes (emitters) of bipolar transistor 5 and further bipolar transistor 6. Control electrodes (bases) of bipolar transistor 5 and further bipolar transistor 6 are coupled to each other and constitute a control input for receiving the control voltage, and first main electrodes (collectors) of bipolar transistor 5 and further bipolar transistor 6 are coupled via second bias current sources 9,10 to the voltage supply and constitute an output and a further output of the balanced controllable amplifier circuit and are coupled to inputs of an operational transconductance amplifier 12. The balanced controllable amplifier circuit 2 according to the invention further comprises four yet further bipolar transistors 29-32 of which the basis are coupled to each other and to a diode 27 and a current source 28, with emitters of two first yet further bipolar transistors 29,30 being coupled to each other and to the emitter of the further bipolar transistor 6, with emitters of two second yet further bipolar

transistors 31,32 being coupled to each other and to the emitter of the bipolar transistor 5, with collectors of one of the first and one of the second yet further bipolar transistors 29,31 being coupled to each other and to the collector of the further bipolar transistor 6, and with collectors of the other one of the first and the other one of the second yet further bipolar transistors 30,32 being coupled to each other and to the collector of the bipolar transistor 5.

Diode 27 for example comprises a bipolar transistor of which the emitter is coupled to ground and of which the basis and the collector are coupled to each other and to the current source 28. At this collector, the bias voltage corresponding with the bias voltage originating from the bias voltage source 24 of Fig. 1 is to be found. Field effect transistors 3,4 are amplifying field effect transistors, like for example a metal oxide semiconductor transistors, and bipolar transistors 5,6 are controlling bipolar transistor, like for example bipolar junction transistors. Transistors 5,31 and 32 form a matched pair (5 is one half of a differential pair, the sum of 31 and 32 is the other half). The same holds for transistors 6,29 and 30.

Again, noise behaviour is improved by making the bias currents of the field effect transistors 3,4 larger than the bias currents of the bipolar transistors 5,6. The two first bias current sources 7,8 generate first bias currents, and the two second bias current sources 9,10 generate second bias currents. The second bias current flows through transistors 5 (6), and the sum of the first and second bias current flows through transistor 3 (4).

The operational transconductance amplifier 12 may comprise non-switchable internal or external resistors and switchable internal or external resistors for feeding back (positive/negative) outputs of the operational transconductance amplifier 12 to (negative/positive) inputs of the operational transconductance amplifier 12.

The receiver 40 according to the invention as shown in Fig. 3 comprises a receiving stage 41 for receiving an input signal and for generating an information signal, and an amplifying stage 42 comprising a controllable amplifier circuit 1,2 for amplifying the information signal, and an outputting stage 43 for outputting the amplified information signal. Such a receiver is for example an audio receiver like a mobile phone, a video receiver like a television, an audio player, a video player, an audio recorder, a video recorder, a modem etc. Receiving stage may be coupled to a cable or to an antenna or to an audio generator or to a video generator etc. and/or may comprise an audio generator, a video generator, a pre-amplifier, a demodulator, a filter, a mixer etc. Amplifying stage 42 may further comprise a further amplifier, a demodulator, a filter, a mixer etc. Outputting stage 43 may comprise a man-machine-interface like a display, a loudspeaker etc. or a processing unit

for further processing purposes or another interface etc. and/or may be coupled to such a man-machine-interface or such a processing unit or a network etc.

The expression"for"in for example"for A"and"for B"does not exclude that other functions"for C"are performed as well, simultaneously or not. The expressions"X coupled to Y"and"a coupling between X and Y"and"coupling/couples X and Y"etc. do not exclude that an element Z is in between X and Y. The expressions"P comprises Q"and "P comprising Q"etc. do not exclude that an element R is comprised/included as well.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. Use of the verb"to comprise"and its conjugations does not exclude the presence of elements or steps other than those stated in a claim. The article"a"or"an"preceding an element does not exclude the presence of a plurality of such elements. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

The invention is based upon an insight, inter alia, that in a prior art controllable amplifier circuits an output characteristic being a drain-source current as a function of the drain-source voltage is much more non-linear than a forward transfer function being the drain-source current as a function of the gate-source voltage, and is based upon a basic idea, inter alia, that the influence of the output characteristic can be reduced by applying a lower terminating impedance to the drain of the amplifying field effect transistor, which can be done by replacing the prior art controlling field effect transistor by the controlling bipolar transistor.

The invention solves the problem, inter alia, of providing a controllable amplifier circuit which introduces less gain dependent distortion during gain control, and is advantageous, inter alia, in that the controllable amplifier circuit has a more linear behaviour.