CONTROLLABLE CHIPLET SERIAL TEST CIRCUIT

WIPO Patent Application WO/2023/212998

A1

A controllable chiplet serial test circuit, relating to the technical field of testing or measurement of semiconductor devices in the manufacturing or processing process. The test circuit comprises a master test module, a slave test module, a clock control module and an output module, the master test module consisting of a test access port module, a segment insertion bit module and a test data register module; a test control signal generated by the master test module is received by the slave test module, and then respectively controls test input signals of a slave chiplet. In addition, the test control signal is input to the clock control module to obtain a clock signal of the slave chiplet. An output signal of the test output module is determined by the test control signal. The test circuit directly controls an internal test signal of a multi-chiplet integrated circuit using an external test port, realizing selection of a chiplet test and final test output, and ensuring the effectiveness and independence of each chiplet test.

CAI ZHIKUANG (CN)
WANG YUNBO (CN)
SONG JIAN (CN)
ZHOU GUOPENG (CN)
YAO JIAFEI (CN)
XU BINBIN (CN)
WANG HENGLU (CN)
WANG ZIXUAN (CN)
GUO YUFENG (CN)

PCT/CN2022/099765

November 09, 2023

June 20, 2022

Click for automatic bibliography generation  

UNIV NANJING POSTS & TELECOMMUNICATIONS (CN)
NANTONG INSTITUTE OF NANJING UNIV OF POSTS AND TELECOMMUNICATIONS CO LTD (CN)

G01R31/28

CN114578217A	2022-06-03
CN112595966A	2021-04-02
CN112667557A	2021-04-16
CN207965049U	2018-10-12
US20220138387A1	2022-05-05

NANJING JINGWEI PATENT & TRADEMARK AGENCY CO., LTD (CN)

View/Download PDF      PDF Help

Previous Patent: KNOWLEDGE DISTILLATION BASED NEURAL NETWORK TRAINING METHOD, DEVICE, AND STORAGE MEDIUM

Next Patent: COMPOSITE CATALYST AND SYNTHESIS METHOD FOR BIO-BASED FURAN CHEMICALS