BACKGROUND TO THE INVENTION

The present invention relates to a commutator circuit for coupling power to a load, and in particular to a circuit suitable for use in a digital power amplifier. The present invention is not however limited in this respect, and the circuit may find use in a variety of different fields. A commutator used, for example, in a digital power amplifier may be required to switch at high frequencies and relatively high power levels. This combination tends to result in the production of high levels of electromagnetic interference (EMI) . In consequence, much effort has to be directed to limiting the EMI generated by any device incorporating such a commutator circuit so as to meet the increasingly stringent statutory limitations on EMI. Conventionally, it has been necessary, for example, to provide extensive shielding around the circuits and to tailor the physical layout of the circuits to minimise the

EMI from the device as a whole.

SUMMARY OF THE INVENTION

According to a first aspect of the present invention a commutator circuit including a commutator bridge having switches in each arm of the bridge and arranged to have a load coupled to a mid-point of the bridge is characterised by a switched resonant arm also coupled to the mid-point of the bridge and arranged to provide controlled resonant commutation of the load.

In the context of the present specification, the term "bridge" encompasses both full and half-bridge topologies. The term "coupling" as used in the present specification encompasses connection via a current buffer and transformer-coupling as well aε direct electrical connection.

The present invention adopts a radically different approach to the problem of EMI. Instead of using a commutator circuit which generates high levels of EMI, and then relying upon appropriate shielding, the present invention uses a modified commutator configuration with resonant control of the voltage switching. This allows precise control over the shape of the leading and trailing edges of the switched waveform and so allows the EMI to be eliminated or reduced at source. The topology enables well defined commutation rates for high current or high energy carrying loads and the consequent delivery of high resolution pulse energy shapes to the load. As well as being of value in limiting EMI, circuits embodying the present invention are also particularly advantageous where it is necessary to drive a complex load, such as inductive, capacitive or inductive plus capacitive combinations. Such loads occur, for example, in motor windings, magnetic windings, transformers, inductors and the like. In circuits embodying the invention, the timing of the commutator switches and the resonant arm switch can be controlled independently of the time-constant characteristic of the resonant components, for example by a PWM signal derived from an audio waveform.

The circuits of the present invention may be particularly advantageous in motor servo drives in which precision power delivery to the motor is required. The circuit when driving a complex load such as a motor can use simple PWM as a method of control and stability. This is by contrast with conventional circuit topologies using resonant elements. The use of the topologies of the present invention with PWM control can result in faster response times.

The commutation rates (rate of change of voltage) experienced in the power leads connecting a drive circuit to a complex impedance load are determined by the component values in the drive circuit. This provides a predictable method of controlling commutation rates so as to keep them

to a minimum thereby limiting EM radiation. As a consequence of this reduction in the radiation from the leads connecting the drive circuit to the load the distance between the load and the drive circuit can be increased whilst still avoiding interference problems.

Preferably the resonant arm is connected to a potential having a value of substantially V/2, where V is the drive potential across the bridge.

The potential at V/2 may possibly, but not necessarily, be provided by the common mid-point of a pair of capacitors connected across the voltage source, as detailed below. Alternatively, in other circuits embodying the invention a three-rail power supply might be used with the potential at V/2 being provided by the middle rail. Preferably the commutator circuit includes a pair of capacitors (Cl, C2) coupled in series with respect to each other and in parallel across respective switches in the arms of the bridge and the switched resonant arm is coupled between the common mid-point of the two capacitors, and the said mid-point of the bridge. Preferably the resonant arm comprises a LC circuit. Preferably the switch in the switched resonant arm is coupled in series with the inductor L of the LC circuit, and more preferably the switch has one pole coupled to the said potential value substantially V/2, and the other pole coupled to the inductor.

This particular arrangement of the inductor L and the switch has the advantage that the pole of the switch can be coupled to a stable reference voltage, and so the operating voltage of the switch remains constant through the commutation cycle.

When the reference voltage at V/2 is provided by the mid-point of a pair of capacitors, then preferably the inductor L is connected in series via the switch to the mid-point of the pair of capacitors and the capacitor C connected in parallel with one of the switches S2 in the arms of the bridge.

Preferably a current buffer is coupled between the switched resonant arm and the mid-point of the bridge. This current buffer may comprise, for example, an operational amplifier. Advantageously, the load may be transformer-coupled to the bridge. Preferably the load is coupled via a transformer having at least three windings including a primary winding connected to the resonant arm and a secondary winding connected to the load. Preferably the ratio of the number of turns on the said primary winding to the εaid secondary winding is m:n where m and n are positive integers and m is greater than n.

The use of transformer-coupling makes it possible to isolate the load from the commutator circuit and means that if desired the load can be maintained at a reference voltage, for example it may be grounded. Where a three winding transformer with a winding ratio of m:n is used, then any current reflected from the load back into the primary circuit is reduced by a ratio of n/m. Where the bridge has a full-bridge topology, then it may include at least two resonant arms, one coupled to each side of the bridge. In general this arrangement provides greatest flexibility in operation and optimum performance in terms of control over the output drive characteristics. However in some uses it may be desirable to reduce the component-count of the circuit, and here advantageously the circuit may use a resonant arm coupled across the bridge, that is with one end connected to each side of the bridge at the respective mid-points. As a further alternative the circuit may still use two resonant arms, but with at least one resonant element common to the at least two resonant arms.

Preferably a snubber network acts on the switch of the or each switched resonant arm. As noted above, circuits embodying the present invention are particularly valuable, for example, as a drive circuit for an electric motor, or in a digital power

amplifier. In the case of audio digital power amplifiers, the ability of the circuit to deliver a drive waveform of precisely controlled energy produces reduced levels of audio distortion. The present invention encompasses εuch drive circuits for electric motors and digital power amplifiers including commutator circuits in accordance with the first aspect of the preεent invention.

According to a second aspect of the preεent invention there is provided a method of operating a commutator circuit including a commutator bridge having switches in each arm of the bridge and arranged to have a load coupled to a mid-point of the bridge, characterised by switching a resonant arm also coupled to the mid-point of the bridge in synchronism with the εwitcheε in the armε of the bridge and thereby resonantly controlling the commutation of the voltage of the mid-point of the bridge.

DESCRIPTION OF THE DRAWINGS

Other aspectε of the preεent invention will become apparent from the description below of preferred examples of the present invention with reference to the accompanying drawings in which:

Figures la & lb iε a circuit diagram of a half-bridge commutator; Figure 2 iε a modified version of the embodiment of Figure 1;

Figure 3 is a graph illustrating the voltage waveform produced by the circuits of Figures 1 and 2;

Figure 4 is a first example of a full-bridge commutator;

Figure 5 is a second example of a full-bridge commutator;

Figure 6 is a graph εhowing schematically the voltage waveforms produced by parallel commutation of a full-bridge circuit;

Figure 7 is a graph εhowing schematically the voltage waveforms produced by serial commutation of a full-bridge circuit;

Figure 8 is a modified half-bridge commutator with the resonant capacitor in an alternative poεition;

Figure 9 iε a modified half-bridge commutator with the resonant capacitor in parallel with the resonant inductor;

Figure 10a & 10b are a third example of a full-bridge commutator;

Figure 11 is fourth example of a full-bridge commutator;

Figure 12 is fifth example of a full-bridge commutator;

Figure 13 is sixth example of a full-bridge commutator;

Figure 14 is a first example of a half-bridge commutator using an alternative switching arrangement for the resonant limb;

Figure 15 is a second example of a half-bridge commutator using an alternative switching arrangement for the resonant limb;

Figure 16 is a further example of a full-bridge commutator in which the load is transformer-coupled;

Figure 17 is a further example of a full-bridge commutator in which the load iε transformer-coupled;

Figure 18 is a half-bridge commutator incorporating snubber networks with the resonant limb;

Figure 19 is an open-loop servo drive circuit;

Figure 20 is a circuit diagram for one channel of a digital audio amplifier;

Figures 21 to 23 are circuit diagrams for the MOSFET drive circuits of Figure 20;

Figure 24 is a plot of output current and voltage waveforms for the circuit of Figure 10a; and

Figure 25 is a drive circuit timing diagram for the amplifier of Figure 20. DESCRIPTION OF EXAMPLES

In a first example, a half-bridge commutator circuit 1 (Figure la) is connected to a load 2. The load 2 is connected to a node N at the mid-point between the two arms of the commutator half-bridge. A further reεonant arm 3 iε connected to the mid-point of the bridge and via a εwitch S3 to the mid-point of two capacitorε Cl, C2 connected in parallel with the commutator εwitcheε SI, S2. Aε deεcribed in further detail below, the circuit provides controlled quasi-resonant commutation. This is particularly useful in applications requiring drive to complex loads such as inductive, capacitive or inductive plus capacitive combination (e.g. motor windings, magnetic windings, transformers, inductors..etc. ) , in which controlled commutation is to be achieved. This topology enables well defined commutation rates for high current or high energy carrying loadε. Conεequently high reεolution pulεe energy shapes may be delivered to the load. The circuit may be used in a digital power amplifier to provide a variable duty cycle pulse width modulated audio waveform having edges which rise and fall resonantly. The timing of the operation of the switches is then controlled by the audio waveform being amplified.

Controlled commutation iε especially of value in limiting EMI (Electromagnetic Interference) and enabling EMC (Electromagnetic Compliance) . The diagram in Figure la shows the basic topology from which more complicated resonantly controlled commutating topologies may be derived e.g Figure 4 and 5 depict the resonantly controlled commutating full bridge drive. In Figure la the voltage source may be a dc power supply (although not necessarily so) and the capacitors Cl and C2 provide a potential at their common connection which is approximately half that of the voltage source. In a practical implementation both Cl and C2 may have resistors in parallel in order to maintain equal voltages across each capacitor. In addition the common connection between Cl and C2 may be at any potential including ground in which

case the load is effectively driven from a bipolar voltage source. Alternatively, as εhown in Figure lb, a third rail or an additional voltage εource at V/2 may be provided to drive the reεonant arm. The εwitcheε may be, e.g., bipolar, MOS, IGBT, thyriεtorε or any other form of εemiconductor εwitch. In fact they may be any form of high or low current εwitch including relayε. The reεonant capacitance C may dominate the paraεitic capacitance of the εwitches SI and S2, or may be equal to or part of this stray capacitance. Also, the capacitance C may be placed acroεε SI rather than S2.

The function of this basic topology is fully defined by the following four modeε of behaviour. In any particular mode only one of the three εwitcheε are cloεed. Furthermore simultaneous operation of the switches is assumed, when moving from one mode to another. Mode 1 SI closed, S2 open, S3 open

In this mode the capacitor Cl supported by the voltage εource V drive the load. The node N is maintained at the voltage +V through the direct connection of SI. Mode 2 Si open, S2 open, S3 closed

In thiε mode the node N undergoeε controlled resonant commutation. The resonant time constant is determined by the valueε of C and L. During this interval departure from true resonant behaviour may occur due to load current contribution at node N. However 'true' resonant behaviour may be achieved through the introduction of a current buffer as depicted in Figure 2. Mode 3 SI open, S2 closed, S3 open

Mode 3 begins after the voltage at node N has changed such that the voltage acrosε S2 iε zero or cloεe to zero volts, and S2 is then cloεed εimultaneously as S3 is opened. The switch S2 is thus zero-voltage switched and the switch S3 may be zero-current switched. Throughout

mode 3 the capacitor C2 εupported by the voltage εource V drives the load. The node N is maintained at the voltage -V through the direct connection of S2. Mode 4 SI open, S2 open, S3 closed

This the final mode begins with the above switch arrangement: SI open, S2 closed and S3 open. In this mode the node N undergoes controlled commutation. The resonant time constant is determined by the valueε of C and L. During this interval departure from true resonant behaviour may occur due to load current contribution at node N. However 'true' reεonant behaviour may be achieved as described earlier through the introduction of a current buffer as depicted in Figure 2. After the voltage at node N has changed such that the voltage acrosε SI iε zero or close to zero voltε, mode 4 endε and the cycle iε repeated. At thiε point in time the topology reεumes the state of mode 1, SI closed, S2 open and S3 open. The diagram in Figure 3 shows clearly the four distinct modes and the corresponding electrical potential at the node N.

In modeε 1 and 3 the switches SI and S2 are in the closed position respectively and connect the drive voltage to the load prior to entering the modes 2 and 4 so that the load undergoes controlled commutation. In modes 2 and 4 the switch S3 iε in the closed poεition. It defineε the controlled commutation interval undergone by the load.

At the beginning of modes 2 & 4 the inductor L has no residual energy associated with it. If necessary this condition is brought about by suitable energy dissipation or storage networks.

Full-Bridge Topologies

Figures 4 & 5 illustrate resonantly controlled commutating full-bridge topologies. In Figure 5 a single resonant capacitor is present and is located acroεε the load between the nodeε N. These topologies are clearly

based on a combination of the previously described 'single side', or half bridge load drive arrangementε.

Aε in a conventional full-bridge arrangement the load may be driven in a push-pull manner through the εimultaneouε operation of εwitches SI and S5 or the εimultaneous operation of switcheε S2 and S4 (εwitcheε SI and Sβ remain open)

However unlike a conventional full-bridge drive, commutation iε reεonantly controlled by the value of the reεonant capacitors and inductors and the timely operation of switches S3 and S6.

The following description together with Figures 6 & 7 describe the two types of controlled commutation that may take place and the modes of operation that result.

Serial or Parallel Controlled Commutation

The commutation is termed εerial or parallel depending on the manner in which the nodeε N, identified in the above topologieε are allowed to commutate. Serial commutation enableε the potential at nodeε N at each end of the load to reεonate in a controlled manner one after the other in time or 'serially'. Alternatively 'parallel' commutation enables the potentials at nodes N at each end of the load to resonate in a controlled manner simultaneously or in 'parallel'.

Parallel commutation occurs within a single mode, whereas εerial commutation involveε two separate and distinct modes of operation.

The behaviour of the above topologies is fully defined by the following modes of operation. Simultaneous operation of the switches is assumed when moving from one mode to another.

Mode 1 SI closed, S2 open, S3 open, S4 open, S5 closed, S6 open

In this mode the voltage source V drives the load. The nodes N are maintained at the voltage +V and -V through the

direct connection of SI and S5 respectively. Refer to mode 2 for a description of parallel commutation or mode 2a for serial commutation. Mode 2 (parallel commutation) SI open, S2 open, S3 closed, S4 open, S5 open, S6 closed In this mode both nodes N undergo controlled commutation. The electrical potentials at both nodes N, change in a symmetrical manner and achieve equal and opposite potentials. Mode 3 follows this mode.

Mode 2a (serial commutation)

51 open, S2 open, S3 closed, S4 open, S5 open, S6 open

In this mode the single node N between switches SI and

52 undergoes controlled commutation while that between εwitches S4 and S5 remains unchanged.

Mode 2b

Si open, S2 closed, S3 open, S4 open, S5 open, S6 closed

The start of thiε mode begins after the voltage at node N (between SI and S2) has changed εuch that the voltage across S2 is zero or close to zero volts, and S2 is then closed simultaneously as S3 is opened. The switch S2 iε thuε zero voltage switched and the switch S3 iε zero current switched. This node is maintained at the voltage -V through the direct connection of S2. The εwitch S4 remainε open while S5 iε opened and S6 is εimultaneouεly closed. In this mode the single node N between switches S4 and S5 undergoes controlled commutation.

Mode 3

Si open, S2 closed, S3 open, S4 closed, S5 open, S6 open.

Mode 3 begins after the voltage at nodes N have changed such that the voltage across S2 is zero or close to zero volts, and S2 is cloεed and the voltage acrosε S4 is zero or close to zero volts, and S4 is closed. Throughout mode 3 the load is driven by the voltage source V. The nodes N are maintained at the voltage +V and -V through the

direct connection of S4 and S2 respectively. Refer to mode 4 for a description of parallel commutation or mode 4a for serial commutation.

Mode 4 (parallel commutation)

SI open, S2 open, S3 closed, S4 open,,S5 open S6 closed

In this mode both nodes N undergo controlled commutation. The electrical potentialε at both nodeε N, change in a symmetrical manner and achieve equal and opposite potentials.

At the time that the voltages acrosε SI and S5 are zero or cloεe to zero volts, mode 4 ends and the cycle may be repeated. At this point in time the topology resumes the state of mode 1.

Mode 4a (serial commutation)

51 open, S2 open, S3 closed, S4 closed, S5 open, S6 open

In this mode the single node N between switcheε SI and

52 undergoeε controlled commutation while that between switcheε S4 and S5 remainε unchanged.

Mode 4b

SI closed, S2 open, S3 open, S4 open, S5 open, S6 closed

The start of this mode begins after the voltage at node N (between SI and S2) has changed such that the voltage acroεε SI is zero or cloεe to zero voltε, and SI is then cloεed simultaneously as S3 is opened. The switch S2 iε thus zero voltage switched and the εwitch S3 iε zero current switched. This node is maintained at the voltage +V through the direct connection of SI. The εwitch S5 remains open while S4 is opened and S6 iε εimultaneouεly dosed. In thiε mode the single node N between switches S4 and S5 undergoes controlled commutation. This mode ends at the time that the voltages acroεε S5 is zero or cloεe to zero voltε, and the cycle may then be repeated. At this point in time the topology reεumes the state of mode 1.

The diagrams in Figures 6 and 7 show clearly the various

modeε for parallel and εerial commutation reεpectively. The potentials at nodes N between the switches SI /S2 and S4/S5 are depicted.

As for the half-bridge topology discuεεed above, commutation period or time is determined by the values of C and L. During this interval departure from true resonant behaviour occurε due to load current contribution at node N. Aε with the previouε εimpler topologieε commutation may be divorced from the effects of load current through the introduction of suitable current bufferε driving both nodeε N. In applications in which power pulse edge distortion due to load current variation is unimportant, e.g. designs offering only low electromagnetic interference (EMI) , load current contribution at nodes N may not pose a problem and may not require current buffer compensation.

In modeε 1 and 3 the εwitcheε SI and S2 are in the closed position reεpectively and connect the drive voltage to the load prior to entering the modes 2 and 4 that the load undergoes controlled commutation.

In modes 2 and 4 the switch S3 is in the closed position. It defines the controlled commutation interval undergone by the load.

At the beginning of modes 3 & 4 the inductor L has no residual energy associated with it. If necessary this condition iε brought about by εuitable energy disεipation or εtorage networks.

The features of adopting a topology utilising a single reεonant capacitor, iε that closely matched commutation at both εideε of the bridge can be achieved and a resulting lower component count design.

Serial commutation of the nodes N may be executed in reverse order to that shown in Figure 7. In fact the commutation of nodes N may take place in any order, and the examples described by no means limits the application.

Switcheε/deviceε, SI, S2, S4 , S5 are zero voltage switched, and S3 and S6 are zero current switched at all

timeε. Thiε arrangement minimiεeε power diεεipation within the deviceε.

OTHER VARIATIONS ON THE BASIC TOPOLOGY The topologies in Figures 8 and 9 behave εi ilarly in operation to that in Figure 1 except that the reεonant capacitor haε been repositioned. Buffered verεions (not shown here) exiεt which can be developed εimilar to that in which Figure 2 waε developed from Figure 1. Full bridge versionε alεo exiεt and may be developed in the manner in which Figure 4 haε been derived from Figure 1. Modeε of operation of theεe complementary topologies are similar to those discussed earlier. The topology of Figure 9, with C parallel to L, reεultε in the capacitor C being charged at both plates and undergoing polarity reversal. Thiε circuit iε therefore εuitable for uεe with non-polarised capacitor typeε. By contraεt, in the circuits of Figures 1 and 8, the capacitor C may be a polariεed, e.g. electrolytic, type. The topology in Figure 9 leadε to that in Figure 10a juεt aε the topology in figure 1 leadε to that in Figure 4. Note that the reεonant capacitor C is repositioned. Modes of operation for topology in Figure 1 are similar to thoεe in Figure 9. Modes of operation for topology in Figure 4 are similar to those for Figure 10a. These modes have already been discussed. Table 1 listε component valueε for one example of the circuit of Figure 10a, and Figure 24 shows the output waveform produced by the circuit. It can be seen that the reεonantly controlled edge of the voltage waveform V3 has a rise-time of around 10 microsecondε, by contraεt with prior art commutatorε where the riεe-ti e might be aε short as 0.1 microseconds.

The circuit of Figure 10a may be modified as shown in Figure 10b by the use of a single capacitor C which is common to the two resonant arms and is connected in parallel acroεε the load. This reduces the number of

components required, and provides increased εymmetry in commutation.

The reεonant capacitor may also be positioned as shown in Figure 11. This iε yet again a variation on the same theme. Topologies in Figureε 12 and 13 again are derived from that in Figure 11. The circuit of Figure 11 uεeε a εingle reεonant arm coupled acroεε the bridge in parallel with the load and connecting the midpoints of either side of the bridge. It offers the advantage of a reduced component count, and with ideal componentε provides intrinsically symmetric commutation of the load. In reality however, stray capacitances are likely to cause departures from symmetry. The position of the switch S5 in Figure 11 has the disadvantage that it has to operate at widely varying voltages, according to the position of the switches of the bridge. The circuits of Figures 12 and 13 are more balanced than Figure 11, but require more components.

The topology in Figures 14 and 15 incorporate the same reεonant limb L and C but the resonant limb is switched into the circuit in a different way. These two topologies however include an extra mode of operation which enables the reεonant capacitor to be precharged to half the supply voltage V/2 in some instances. In the topology of Figure 14, the switch S3 switches at peak current. In the circuit of Figure 15, the switching voltage of S3 varies according to the configuration of the commutator switcheε SI, S2.

Topologies 16 and 17 give an example of how the action of the resonant limb may be transformer coupled into the load. This allows the load to be isolated from the commutator circuit and so is advantageous, for example, in applications in medical electronicε where the load may be in contact with a patient, or in technology for rail- mounted vehicles, where isolation may be required to reduce εusceptibility to interference. The load may be grounded or connected to a reference voltage.

The tranεformer uεed for coupling the load in these Figureε haε three windingε, with more windings on the primary side connected to the commutator circuit than on the secondary side connected to the load, giving a winding ratio m:n. The middle winding connected to the midpoints of the bridge may, for example have the εame number of windings as the secondary. This arrangement has the advantage that any current reflected back into the primary from the load iε reduced in the ratio n/m and the load reflected in to the resonant limb iε lesε.

LOSSY AND LOSSLESS SNUBBER NETWORKS

In all the topologies it may be desirable to introduce snubber networks in the implementation of a deεign. Snubber networkε may be incorporated with the "εwitcheε" aεεociated with the reεonant limb (e.g. S3 in Figure 1) . A typical network is εhown in Figure 18 to include snubber network components Dl, D2, D3, D4, C3, C4, Rl and R2. The snubber networks effectively reset the starting conditionε for the εwitch, reduce the peak current on cloεing and εo reduce r.f. emission from the εwitch.

A loεεleεε network, may be introduced, that returnε energy to the εupply aε a method of improving efficiency whilεt enεuring initial topology conditionε at the εtart of each mode of operation.

It iε however unlikely that εnubber networkε will be needed for the "switcheε" not aεεociated with the reεonant limb (e.g. SI and S2 in Figure 1 etc.).

MOTOR DRIVE CIRCUIT

Figure 19 εhows an open loop servo drive circuit for an electric motor. The commutator in this circuit haε a topology generally corresponding to that of Figure 10a discusεed above. The switches SI, S2, S4, S5 are controlled by drive voltages from the drive circuits DR1, DR2. Theεe circuitε are arranged to provide voltageε appropriate to the εwitch-types used in the commutator

bridge with the drive signals to the different switches being effectively isolated from each other. The drive circuits DR1, DR2 are controlled by reεpective pulse-width modulated signals PWMl, PWM2 output by a control circuit CONT. The control circuit outputs a third PWM εignal, PWM3 which operateε the εwitches in the resonant arms S3, S6 via a third drive circuit DR3. The signals PWM1-PWM3 are synchronised with respect to each other with timing waveforms for example as εhown in the figure, εo aε to produce a desired commutation cycle. The relative timing of the different drives may be varied according to whether parallel or serial commutation is required.

In the control circuit CONT the PWM waveforms are produced by comparators COMP which have inputs taken reεpectively from a variable reference voltage source RV and an oscillator OSC producing a saw tooth output. The reference voltages may be adjusted so as to vary the duty cycle of the PWM signals, thereby providing control over the speed of the motor. Although the basic circuit shown is an open-loop drive, this may be elaborated, for example, by adding a feedback loop from a motor speed senεor to the control circuit CONT. As an alternative to PWM, a variable frequency control may be used for the motor.

DIGITAL AUDIO AMPLIFIER

Figure 20 is a circuit diagram for one channel of a digital audio amplifier incorporating a commutator in accordance with the present invention. In thiε circuit, each PWM BUS haε eight lineε SI S2 PI S3 S4 P2 S5 S6, where S-lineε are connected to εignal windingε, P-lines to power windings. All lines are combined to drive the switching elements swl-sw8 according to the timing diagram of Figure 25. The circuit has power rails at +30V and -30V. The εwitcheε εw5/6 εw7/8 uεed in thiε example incorporate body diodes and are therefore used in pairs with the body-diodes

in opposition. The commutator topology generally correspondε to that of Figure 10a.

Figures 21 and 23 show circuits generating inputs Q3,

Q4 to the one of the 8 MOSFET drive circuitε shown in Figure 22 (the other drive circuits correspond and have corresponding input circuits) . The switching element is a

MOSFET device IRF530.

It will be understood that specific circuit configurations and component values are given by way of example only, and that other circuits and values may be selected while still falling within the scope of the present invention.

Table 1

(PSPICE Listing)