Title:
A/D CONVERTER
Document Type and Number:
WIPO Patent Application WO/2017/208635
Kind Code:
A1
Abstract:
Provided is an A/D converter that comprises: integration circuits (10, 12, 14) for executing ΔΣ modulation for which an analog signal (Vin) to be converted is used as an input signal; adders (30, 32) for outputting an addition result obtained by adding at least output signals of the integration circuits and a first reference signal (Vrefs) serving as a reference signal in the ΔΣ modulation; quantizers (20, 26) to which are inputted the output signals of the integration circuits, output signals of the adders, and a second reference signal (Vrefc) serving as a reference signal in cyclic A/D conversion, and which generate a quantization result from quantizing the output signals of the integration circuits and the output signals of the adders; and a control unit (40) for operating by switching between a ΔΣ modulation module in which the integration circuits, the adders, and the quantizers are operated as a ΔΣ modulator, or a cyclic mode in which the integration circuits and the quantizers are operated as a cyclic A/D converter, and for generating an A/D conversion result (Dout) from the analog signal on the basis of the quantization result.
Inventors:
NEZUKA TOMOHIRO (JP)
Application Number:
PCT/JP2017/014906
Publication Date:
December 07, 2017
Filing Date:
April 12, 2017
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H03M3/02; H03M1/12; H03M1/14
Domestic Patent References:
| WO2014141350A1 | 2014-09-18 |
Foreign References:
| JP2015171046A | 2015-09-28 | |||
| JP2015133626A | 2015-07-23 | |||
| JP2016039490A | 2016-03-22 |
Other References:
ZHUO ZHANG ET AL.: "A Low-power 14-bit Two-stage Hybrid ADC for Infrared Focal Plane Array Detector", INFORMATION TECHNOLOGY, NETWORKING, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE, May 2016 (2016-05-01), pages 386 - 390, XP032956143
Attorney, Agent or Firm:
JIN Shunji (JP)
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