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Title:
A/D CONVERTER
Document Type and Number:
WIPO Patent Application WO/2017/208635
Kind Code:
A1
Abstract:
Provided is an A/D converter that comprises: integration circuits (10, 12, 14) for executing ΔΣ modulation for which an analog signal (Vin) to be converted is used as an input signal; adders (30, 32) for outputting an addition result obtained by adding at least output signals of the integration circuits and a first reference signal (Vrefs) serving as a reference signal in the ΔΣ modulation; quantizers (20, 26) to which are inputted the output signals of the integration circuits, output signals of the adders, and a second reference signal (Vrefc) serving as a reference signal in cyclic A/D conversion, and which generate a quantization result from quantizing the output signals of the integration circuits and the output signals of the adders; and a control unit (40) for operating by switching between a ΔΣ modulation module in which the integration circuits, the adders, and the quantizers are operated as a ΔΣ modulator, or a cyclic mode in which the integration circuits and the quantizers are operated as a cyclic A/D converter, and for generating an A/D conversion result (Dout) from the analog signal on the basis of the quantization result.

Inventors:
NEZUKA Tomohiro (C/O DENSO CORPORATION, 1-1 Showa-ch, Kariya-city Aichi 61, 〒4488661, JP)
Application Number:
JP2017/014906
Publication Date:
December 07, 2017
Filing Date:
April 12, 2017
Export Citation:
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Assignee:
DENSO CORPORATION (1-1 Showa-cho, Kariya-city Aichi, 61, 〒4488661, JP)
International Classes:
H03M3/02; H03M1/12; H03M1/14
Attorney, Agent or Firm:
JIN Shunji (6th Floor, Takisada Bldg. 2-13-19, Nishiki, Naka-k, Nagoya-city Aichi 03, 〒4600003, JP)
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