Title:
COUNTER CIRCUIT, DISPLAY UNIT AND CONTROL SIGNAL GENERATION CIRCUIT EQUIPPED WITH THE COUNTER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2007/135793
Kind Code:
A1
Abstract:
In a counter circuit (1) of a control signal generation circuit (2), a selection
circuit (3) selects a predetermined signal from an HSYNC signal and a VSYNC signal
as a pulse signal and inputs the same to a counter (4) in accordance with control
of a selection circuit control signal (CTR). The counter (4) outputs a counting
result of the input pulse signal. On the basis of the counting result, a VSYNC
synchronous signal generation circuit (5) or a HSYNC synchronous signal generation
circuit (6) generates a control signal which controls driving of a display.
Inventors:
NAKAGAWA YOUSUKE
Application Number:
PCT/JP2007/053067
Publication Date:
November 29, 2007
Filing Date:
February 20, 2007
Export Citation:
Assignee:
SHARP KK (JP)
NAKAGAWA YOUSUKE
NAKAGAWA YOUSUKE
International Classes:
H03K23/00; G09G3/20; G09G3/36
Foreign References:
JP2001136059A | 2001-05-18 | |||
JPH08184794A | 1996-07-16 | |||
JPH11265173A | 1999-09-28 |
Attorney, Agent or Firm:
HARAKENZO WORLD PATENT & TRADEMARK (2-6 Tenjinbashi 2-chome Kita, Kita-k, Osaka-shi Osaka 41, JP)
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