DESCRIPTION

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention generally relates to electromagnetic interference (EMI) input filters for power factor correction (PFC) circuits and, more particularly, to EMI input filters for a PFC circuits employing an impedence damping circuit.

Description of the Prior Art

Design of electromagnetic interference (EMI) input filters for power factor correction (PFC) circuits is becoming increasingly important. This is due, at least in part, to increased power line sensitivity to EMI disturbances and, perhaps more importantly, to more stringent government and industry imposed EMI and PFC standards. With the rapid development of power electronics technology, the size of switching power converters is constantly decreasing. Unfortunately, this is not true for the size of the input filters which, in higher power PFC circuits, account for a large portion of the converter's weight and volume.

EMI filters for PFC circuits must be designed to meet three main requirements. First, the EMI input filter must provide switching noise attenuation within preset guidelines. Such guidelines are typically

dictated by EMI control standards, such as, for example, VDE 0871, FCC, or Mil. Std. 461C, etc. Most standards require very low EMI levels, so that the required switching frequency attenuation, for a typical 1 kW = 10 kW converter switching in the 60 kHz range, is between 60 and 120 dB, depending on the converter power and topology.

Second, the PFC circuit input filter design must achieve a low input displacement angle between filter input voltage and current (i.e. achieve a power factor near unity). Figure la shows a simplified diagram of a PFC converter having a simple LC network input filter. Figure lb shows the phasor diagram of the system currents and voltages.

A typical PFC circuit is operated in a way that produces converter current, i _a , that is in phase with the converter voltage, v _a . Since the voltage drop across the input filter inductor L is very small at line frequency, the voltage at the converter input is essentially equal to the line voltage v _A . The voltage v _a causes reactive current i _c to flow through the filter capacitor C. The total current drawn from the line i _A , is therefore, phase shifted relative to the input voltage by the angle θ, resulting in reduced power factor. If v _a and i _a are given by:

v =v =V cos ωt ■I cos ωt ( l !

where V _m and I _m are the voltage and current amplitudes, respectively, the input current I _A in Figure 1 is:

i -i + i =1 cos ωt - ω V sin ωt (2 )

Therefore, the current i _A leads the voltage v _A by a phase angle:

ω C V θ = tan ^" ( 3 )

The phase shift is proportional to the filter capacitance value, so in order to maintain high input displacement factor (IDF), defined as IDF ≡ cos θ, the capacitor size has to be minimized. This typically translates into an upper limit value for the filter capacitor, which from (3) is:

In the case of multi-stage filters, C _^ ,. represents the limit for the sum of all capacitances in the filter. The capacitor size limitation has deep implications on the PFC circuit filter design. In order to meet the required attenuation specifications, the filter inductor size increases, resulting in overall filter size increase. Filter damping methods typically applied in the dc-dc converter filters cannot be used. The input filter output impedance, determined by the total filter capacitance, is more difficult to control, potentially resulting in converter instability. Third, the filter must not compromise overall system stability.

This amounts to controlling the impedance interaction between the input filter and converter. In general, the filter output impedance should be as low as possible when compared to the converter input impedance. The

filter control impedance can be reduced by increasing the filter capacitor size. The impedance interaction constraint will practically determine the lower bound on the filter capacitor value. Proper filter pole damping is extremely important for achieving low filter output impedance and overall system stability. As discussed below, the damping methods used in PFC input filters are rather different than those used in the dc-dc converter filters.

The requirements outlined above lead to the conclusion that high- order filters with high stop-band transfer characteristics have to be used in PFC circuits. Using filters with such characteristics enables filter design with relatively low switching frequency to filter corner frequency ratio, thereby reducing the filter component values and filter size.

One filter type that is known to provide these features is the Cauer-Chebyshev (CC) filter, also known as the elliptic-integral filter. A two-stage CC filter with normalized component values, and a typical attenuation characteristic are shown in Figure 2a and 2b, respectively. The CC filter shown in Figure 2a can be used either in a single-phase or a three-phase PFC system. In a three-phase system the filter of Figure 2a would be a per-phase filter connected between the line and neutral points.

Figure 3 shows four possible filter pole damping methods. The damping method shown in Figure 3a is typically used in dc-dc converters. Unfortunately, this method is not applicable in ac power converters since in order for the damping resistor R^ to be effective, the capacitor in series with Rj has to be at least ten times bigger than the other filter capacitor. This typically causes excessive damping resistor dissipation at line frequency due to the ac current flowing through the parallel R-C damping branch.

The damping method in Figure 3b uses a parallel R-L branch 10.

This method eliminates the excessive resistor dissipation, and is therefore widely used in ac power converter filters. The drawback of this method is that the parallel R-L branch 10 provides an alternative path for high- frequency current, thus deteriorating the high-frequency attenuation capability of the filter. The use of this damping method results in excessively large filter components, because in order to meet the high- frequency attenuation characteristic, the filter has to be over designed by typically more than 50% compared to other filters.

The damping method shown in Figure 3c provides an optimal filter attenuation characteristic, and is commonly used in low-power electronic circuits. This method, however cannot be used in power electronics circuits due to excessive power dissipation in the damping resistor ι .

SUMMARY OF THE INVENTION

It is therefore an object of the present invention to provide a damped EMI input filter for a power factor correction (PFC) circuit, commonly used at the input stage of a switchmode power supply (SMPS);

It is yet another object of the present invention to provide an inexpensive EMI input filter for a SMPS which has reduced weight and volume.

According to the invention, an active damping circuit for an electromagnetic interference (EMI) filter for power factor correction

(PFC) circuit is provided which simulates a line damping impedance which actively varies according to sensed line current. The active damping circuit comprises an nth-order Cauer-Chebyshev low-pass filter having input series damping impedance (R,,) simulated with a power

operational amplifier and high-frequency isolation transformers. The simulated damping impedance offers greatly reduced size and power dissipation as compared to prior art passive schemes which typically require large impedance components for damping. A passive damping circuit is also shown which involves providing an alternate inductive current path in parallel with a damping resistor whereby lower frequency currents are diverted through the alternate current path and higher frequency currents continue through the damping resistor. In this manner, the damping action of the damping resistor is attenuated at lower frequencies but remains unaffected for higher frequencies.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other objects, aspects and advantages will be better understood from the following detailed description of a preferred embodiment of the invention with reference to the drawings, in which:

Figure la is diagram showing a simplified power factor correction circuit and input filter; Figure lb is a current and voltage phasor diagram for the circuit shown in Figure la;

Figures 2a and 2b is a Cauer-Chebyshev filter and a typical filter attenuation graph, respectively;

Figures 3a-c are three passive filter pole damping circuits; Figure 3d is a passive filter pole damping circuit according to one embodiment of the present invention;

Figure 4a is an active damping circuit according to an embodiment of the present invention;

Figure 4b is an impedance characteristic diagram for the active

damping circuit shown in Figure 4a;

Figures 5a-c are three example filters used to illustrate the benefits of the present invention;

Figure 6 is a transfer function diagram comparing active damping of the present invention to resistor damping;

Figure 7 is filter responses to current transients.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT OF THE INVENTION

Referring now to the drawings, and more particularly to Figure 3d, there is shown a new passive damping circuit used as the input filter for a PFC circuit for a SMPS which solves the excessive damping resistor power dissipation problem found in the circuit shown in Figure 3c without affecting the damping action of the resistor at high frequencies. This is accomplished by providing an alternate line current path 12 through an inductor L _d . Lower frequency currents are routed through the alternate current path while higher frequency currents continue to pass through the damping resistor. The main drawback of this damping method is that the corner frequency of the damping network, given by f _d = R/(2πL), has to be significantly lower than the lowest frequency of the filter pole. This requirement typically results in a large value of inductor L _d . If however, smaller inductor size is a design consideration, an active impedance simulation scheme may be used.

Referring now to Figure 4a, an active damping circuit is shown which may replace R_ and L _d connected between points a and b in Figure 3d with an nth-order Cauer-Chebyshev (CC), low-pass filter. The input series damping impedance, R_ and L _d , is implemented with a power

operational amplifier 20 and a two high-frequency isolation transformers. Figure 4a shows the first transformer labeled as Tl and the second as T2. The primary winding of Tl is used to sense current flowing in the line 22 and the secondary winding connects to the operational amplifier 20. The low-frequency current components sensed by Tl are by-passed to ground through inductor L. The high-frequency current components flow through capacitor C and resistor R to create a voltage at the output of the operational amplifier 20. The voltage v _d at high frequencies is proportional to the line current, i.e. v _d = Rfl/n, _. ), where n, is the turns of Tl. This voltage is impressed across the secondary winding of the transformer T2, so that the effective resistance seen in the primary is:

* _{J ≡} ^. ( 5 ) n . n.

The corner frequency of L and C has to be set to be much higher than to line frequency, and much lower than the lowest input filter pole frequency. The resistor R' in parallel with L provides damping for the resonant circuit formed by L and C. The theoretical impedance characteristic Z(f) as seen by Tl is shown the graph shown in Figure 4b. The graph shows low-loss inductive characteristic at line frequency and a resistive nature at frequencies close to the filter poles. The inventive active circuit provides significant savings in size compared to the passive damping circuit realization. The power processed by the circuit is typically less than 0.1 % of the total converter power. A method for calculating component values for the Cauer-

Chebyshev (CC), low-pass input filter for the present invention may be

carried out as follows:

1. The allowable EMI voltage (V _emi ) at the switching frequency from applicable EMI standards must be determined. V _emi is typically specified as voltage drop on a resistor R, _isn (line impedance stabilization network) caused by the converter current I _nne .

2. The switching frequency current, I _sw , generated by the converter must be determined. This can be done either analytically or by measurement.

3. The required filter attenuation A _mir at the switching frequency as:

4. Choose an input displacement factor constraint. The constraint is chosen as a desired minimum IDF under certain line voltage, V _line , and current, I, _inc , conditions, typically high-line, partial load.

5. Calculate the total maximum filter capacitance using equation (4), with I _m = l _line , and V _m = V _line .

6. Choose the filter order using a reasonable passband ripple (A _n ,,,- - 2dB) and assuming that the converter is running under no-load condition (K ² =~). The choice may be made either using filter order nomographs, as found in A. I. Zverev, Handbook of Filter Synthesis, 1967, which is herein incorporated by reference, or by reading filter tables. There is some freedom in this step. Filters of higher order may end up being smaller than those of lower order.

7. Normalized the filter parameters from the filter table in the last

step.

8. Calculate the reference frequency ω _r , as:

2 f ( 7 ; ω = 0 . 8 — H-i

where f _sw is the converter switching frequency, and Ω _s , is as defined in Figure 2b. With the reference frequency calculated in this manner, the frequency of the filter transfer function first notch will be 20% below the switching frequency. It is important to place the switching frequency sufficiently far from the transition region, so that any variation of filter component values does not influence its attenuation characteristic at switching frequency significantly.

9. Calculate the damping resistor as:

i =n/ 2

: β ) i = 1 ω r C max

10. Denormalize the remaining filter components using:

I '*, _ C ' ( 9 ) ω r ω r R_ d

11. Choose the transformer turns ratios n, and n ₂ according to the maximum line current and the operational amplifier voltage and current capabilities. Calculate R from equation (5). Use Tl's magnetizing inductance as L, and calculate C so that 1/(2 =/LC) is much higher than the line frequency, and much lower than the lowest filter pole frequency.

Example

For this example, a per-phase filter for a lkW, three-phase buck rectifier switching at 100 kHz, is designed as follows:

1. The filter is designed according to the VDE0871 'Class A' specifications which allow no more than V _enιi = 74 dBμV of switching noise at 100 kHz with R, _isn = 50 Ω.

2. The converter is producing I _sw = 1 A. 3. This yields a required filter switching frequency attenuation of

A _min = 80 dB.

4. IDF is required to be IDV ___ 0.94 with V^- = 170 V and I^,- = 3.5 A.

5. This yields C^,- = 14 μF. 6. The filter order is chosen as n = 4 with A _ma - = 1.25dB.

7. The normalized filter parameters, as shown on pages 200-201 of A. I. Zverev, supra, are Q _s = 4.46, L", = 1.11, L' ₂ = 0.03, L' ₃ = 1.96, C ₂ = 1.36, and C ₄ = 1.25.

8. The reference frequency is ω _r = 112700 rad/s. 9. The damping resistor is Rj = 1.7 Ω.

10. The denormalized filter parameters are L, = 17 μH, ]_j = 0.5 μH, Lj = 30 μH, and C ₂ = C ₄ = 17 μF.

11. The active damping is implemented with n, = n ₂ = 50, which gives R = 4.3 kΩ. The inductance value is chosen as L = 16

mH, which is actually the magnetizing inductance of Tl. Since the lowest filter pole is at 5 kHz, the L-C corner frequency is chosen at 1 kHz, which gives C = 1.5μF. The damping scheme is implemented with the PA26 power operational amplifier. Figure 5a shows the two-stage filter designed in the above example. The presented procedure is applicable to the design of filters of any order. A possible three-stage implementation of the input filter that meets the specifications of the example is shown in Figure 5b. The two and three stage filters illustrate the possibility of reducing the overall filter size by increasing the number of filter stages.

Figure 5c shows a three-stage filter designed to meet the specifications of the example, but using the standard parallel R-L damping method. The total inductance in this filter is around 60 μH as compared to only 18 μH in the actively damped filter. The reduction of inductor size leads both to significant reduction of filter size and also the reduction of the filter output impedance, thus contributing to the overall system stability.

The filter presented in the design example has been implemented and tested. Figure 6 shows the measured transfer functions of the implemented filter which is damped passively using only the 1.7Ω series resistor (circuit shown in Figure 3c), and of the filter with active damping. This demonstrates that the active damping scheme provides me required damping without affecting the ideal filter transfer function. Figure 7 shows the damping circuit performance under large- signal transient conditions where the filter input current (i of the circuit shown in Figure 4a) is not damped, i.e. with the active damping circuit turned off. The filter is connected to a converter working with IA square-wave current transient. The high-frequency oscillations originate from the undamped 5 kHz filter pole. Figure 7b shows the same current

when the active damping circuity according to the present invention is operational. Figure 7c shows the operational amplifier output voltage (v _d , Figure 4a). It is seen that even though mere is a large 60 Hz current component in the filter current, the voltage v _d contains only a very small 60 Hz component.

While the invention has been described in terms of a single preferred embodiment, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the appended claims.