Title:
DATA COMMUNICATION DEVICE AND DATA COMMUNICATION METHOD
Document Type and Number:
WIPO Patent Application WO/2020/144737
Kind Code:
A1
Abstract:
According to the present invention, a shift register (102) receives, as serial reception data (SDI) for each cycle of a serial clock (CLK), each bit of an address (A0 – A7) for selecting readout data (RDAT) from a plurality of pieces of data stored in a register circuit (103). A register selection circuit (107) executes, in different clock cycles, a selection of a plurality of pieces of candidate data (DAT1, DAT0) from among a plurality of pieces of data based on some bits (A1-A7) among the address (A0-A7), and a selection of the readout data (RDAT) from among the plurality of candidate data (DAT1, DAT0) based on the remaining bit (A0) among the plurality of bits. A shift register (115) outputs, as serial transmission data (SDO) for each cycle of the serial clock (CLK), a plurality of bits that form the selected readout data (RDAT).
Inventors:
TANAKA SUSUMU (JP)
Application Number:
PCT/JP2019/000188
Publication Date:
July 16, 2020
Filing Date:
January 08, 2019
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
G06F12/00; G11C7/10; H04L29/12
Foreign References:
JPH04160445A | 1992-06-03 | |||
JPS6417284A | 1989-01-20 | |||
JP2008054053A | 2008-03-06 |
Attorney, Agent or Firm:
FUKAMI PATENT OFFICE, P.C. (JP)
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