Title:
DATA INTERFACE, CHIP AND CHIP SYSTEM
Document Type and Number:
WIPO Patent Application WO/2020/034069
Kind Code:
A1
Abstract:
A data interface (101), a chip, and a chip system. The data interface (101) comprises: a static protection circuit (103); a charge sending circuit (102), which is connected to a binding wire (104) by means of the static protection circuit (103), wherein the charge sending circuit (102) comprises a first capacitor, and the charge sending circuit (102) transfers a charge in the first capacitor to a parasitic capacitor of the static protection circuit (103) and a parasitic capacitor of the binding wire (104) so as to generate a first voltage signal and outputs the first voltage signal by means of the binding wire (104). The data interface (101) employs a manner of charge redistribution between a charge capacitor and parasitic capacitors, which may lower power loss caused by parasitic capacitors in a communication channel, and may also effectively reduce delay. In addition, using single-line communication avoids the use of dual-line communication, which lowers the manufacturing costs relative to LVDS.
More Like This:
Inventors:
ZHANG MENGWEN (CN)
YANG BOXIN (CN)
YI LVFAN (CN)
YANG BOXIN (CN)
YI LVFAN (CN)
Application Number:
PCT/CN2018/100290
Publication Date:
February 20, 2020
Filing Date:
August 13, 2018
Export Citation:
Assignee:
SHENZHEN GOODIX TECH CO LTD (CN)
International Classes:
H03K19/0175
Foreign References:
CN202759437U | 2013-02-27 | |||
CN103369809A | 2013-10-23 | |||
CN203205866U | 2013-09-18 |
Other References:
See also references of EP 3629479A4
Attorney, Agent or Firm:
LONGSUN LEAD IP LTD. (CN)
Download PDF: