Title:
DATA PROCESSING APPARATUS WITH MEMORY RENAME TABLE FOR MAPPING MEMORY ADDRESSES TO REGISTERS
Document Type and Number:
WIPO Patent Application WO/2015/084493
Kind Code:
A3
Abstract:
A data processing apparatus has a memory rename table for storing memory rename entries each identifying a mapping between a memory address of a location in memory and a mapped register of a plurality of registers. The mapped register is identified by a register number. In response to a store instruction, the store target memory address of the store instruction is mapped to a store destination register and so the data value is stored to the store destination register instead of memory. A memory rename entry is provided in the table to identify the mapping between the store target memory address and store destination target register. In response to a load instruction, if there is a hit in the memory rename table for the load target memory address then the loaded value can be read from the mapped register instead of memory.
Inventors:
PUSDESRIS JOSEPH MICHAEL (US)
KANG YIPING (US)
PELLEGRINI ANDREA (US)
MUDGE TREVOR NIGEL (US)
VANDERSLOOT BENJAMIN ALLEN (US)
KANG YIPING (US)
PELLEGRINI ANDREA (US)
MUDGE TREVOR NIGEL (US)
VANDERSLOOT BENJAMIN ALLEN (US)
Application Number:
PCT/US2014/060878
Publication Date:
November 12, 2015
Filing Date:
October 16, 2014
Export Citation:
Assignee:
UNIV MICHIGAN (US)
International Classes:
G06F9/38; G06F9/30
Domestic Patent References:
| WO2005111794A1 | 2005-11-24 |
Other References:
POSTIFF M ET AL: "The store-load address table and speculative register promotion", MICRO-33. PROCEEDINGS OF THE 33RD. ANNUAL ACM/IEEE INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE. MONTEREY, CA, DEC. 10 - 13, 2000; [PROCEEDINGS OF THE ANNUAL ACM/IEEE INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE], LOS ALAMITOS, CA : IEEE COMP. SOC, U, 10 December 2000 (2000-12-10), pages 235 - 244, XP010528891, ISBN: 978-0-7695-0924-2
HEGGY B ET AL: "ARCHITECTURAL SUPPORT FOR REGISTER ALLOCATION IN THE PRESENCE OF ALIASING", PROCEEDINGS OF THE SUPERCOMPUTING CONFERENCE. NEW YORK, NOV. 12 - 16, 1990; [PROCEEDINGS OF THE SUPERCOMPUTING CONFERENCE], WASHINGTON, IEEE COMP. SOC. PRESS, US, vol. CONF. 3, 12 November 1990 (1990-11-12), pages 730 - 739, XP000269009, ISBN: 978-0-8186-2056-0, DOI: 10.1109/SUPERC.1990.130093
HEGGY B ET AL: "ARCHITECTURAL SUPPORT FOR REGISTER ALLOCATION IN THE PRESENCE OF ALIASING", PROCEEDINGS OF THE SUPERCOMPUTING CONFERENCE. NEW YORK, NOV. 12 - 16, 1990; [PROCEEDINGS OF THE SUPERCOMPUTING CONFERENCE], WASHINGTON, IEEE COMP. SOC. PRESS, US, vol. CONF. 3, 12 November 1990 (1990-11-12), pages 730 - 739, XP000269009, ISBN: 978-0-8186-2056-0, DOI: 10.1109/SUPERC.1990.130093
Attorney, Agent or Firm:
SPOONER, Stanley, C. (901 North Glebe Road 11th Floo, Arlington VA, US)
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