Title:
DATA RECEPTION APPARATUS, AND DATA COMMUNICATION SYSTEM
Document Type and Number:
WIPO Patent Application WO/2014/010236
Kind Code:
A1
Abstract:
A data reception apparatus (3) determines an integrated number of bits by integrating the number of bits of a bit sequence, determines an integrated number of samples by integrating the number of samples obtained by oversampling each bit, determines an approximating line indicating the correspondence between the integrated number of bits and the integrated number of samples, and determines the bit length of the bit sequence corresponding to a segment in which the same value continues after the integrated number of samples on the basis of the approximating line. Even if a reception side oscillating source (4) has a degree of clock frequency error from a transmission side oscillation source (6), the number of samples per bit of the bit sequence is accurately determined with higher accuracy than the oversampling period (inverse of the number of samples).
Inventors:
AKITA HIRONOBU (JP)
MATSUDAIRA NOBUAKI (JP)
YAMAMOTO HIROFUMI (JP)
MATSUDAIRA NOBUAKI (JP)
YAMAMOTO HIROFUMI (JP)
Application Number:
PCT/JP2013/004254
Publication Date:
January 16, 2014
Filing Date:
July 10, 2013
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H04L7/02; H04L25/40
Foreign References:
| JPH0497633A | 1992-03-30 | |||
| JP2006262165A | 2006-09-28 | |||
| JP2006109082A | 2006-04-20 | |||
| JPH09191298A | 1997-07-22 | |||
| JPH08317007A | 1996-11-29 |
Attorney, Agent or Firm:
KIN, Junhi (JP)
Gold Junki (JP)
Gold Junki (JP)
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