Title:
DELAY LINE FOR DIFFERENTIAL SIGNAL
Document Type and Number:
WIPO Patent Application WO/2010/103614
Kind Code:
A1
Abstract:
Disclosed is a delay line for a differential signal wherein signal degradation and generation of common mode noise can be controlled by making a proper skew correction including delay time difference. First and second delay line elements (3, 5) are formed on a first dielectric substrate (1) and have delay times different from each other. An input-side terminal portion (23) is formed on the first dielectric substrate (1) and has first and second input terminals (7, 9) connected to the input side of the first and second delay line elements (3, 5), and input-side ground terminals (11, 13). An output-side terminal portion (25) is formed on the first dielectric substrate (1) and has first and second output terminals (15, 17) connected to the output side of the first and second delay line elements (3, 5), and output-side ground terminals (19, 21) connected with the input-side ground terminals (11, 13). The output side terminal portions (23, 25) are formed in an equilibrium state on each side.
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Inventors:
KAMEYA MASAAKI (JP)
Application Number:
PCT/JP2009/054514
Publication Date:
September 16, 2010
Filing Date:
March 10, 2009
Export Citation:
Assignee:
ELMEC CORP (JP)
KAMEYA MASAAKI (JP)
KAMEYA MASAAKI (JP)
International Classes:
H03K5/14
Foreign References:
| JPH01293703A | 1989-11-27 | |||
| JP2005295165A | 2005-10-20 |
Attorney, Agent or Firm:
SAITO, YOSHIHARU (JP)
Yoshiharu Saito (JP)
Yoshiharu Saito (JP)
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