Title:
DELTA-SIGMA A/D CONVERTER
Document Type and Number:
WIPO Patent Application WO2000008765
Kind Code:
A3
Abstract:
A delta-sigma modulator (196) comprising a first quantizer (202) providing a first digital signal d0(k) representing the input signal g(t); a loop filter (198) with input signal paths (200); a loop quantizer (160) providing a corrective digital signal d1(k) representing the loop filter's (198) output signal y(t); an array of feedback DACs (162) D/A converting the sum d(k) = df(k) = d0(k) + d1(k) of the first and the corrective digital signals and injecting feedback signals into the loop filter (198). The loop filter's (198) input note (164) is applied the difference of the input signal g(t) and the global analog feedback signal a3(t). The global feedback signal a3(t) is delayed several clock cycles with respect to the digital output signal d(k). The delay is used to carry out mismatch-shaping and deglitching algorithms in the feedback DACs (162). The feedback DACs' (162) different delays and gain coefficients are designed such that the modulator (196) is stable. The filter's input signal paths (200) and the compensating DAC (204) are designed such that the gain from the input signal g(t) to the loop quantizer (160) is small, ideally zero. Thus, the loop quantizer's (160) resolving range can be a fraction of the first quantizer's (202) resolving range, whereby the output signal's d(k) resolution can be much higher than the individual resolutions of d0(k) and d1(k). The delta-sigma modulator (196) is well suited for the implementation of high-resolution wide-bandwidth A/D converters. Important applications include digital communication systems.
Inventors:
STEENSGAARD-MADSEN JESPER (US)
Application Number:
PCT/IB1999/001403
Publication Date:
August 10, 2000
Filing Date:
August 06, 1999
Export Citation:
Assignee:
STEENSGAARD MADSEN JESPER (US)
International Classes:
H03M1/14; H03M3/04; (IPC1-7): H03M3/04; H03M1/14
Foreign References:
| EP0454406A1 | 1991-10-30 |
Other References:
BROOKS T L ET AL: "A CASCADED SIGMA-DELTA PIPELINE A/D CONVERTER WITH 1.25 MHZ SIGNAL BANDWIDTH AND 89 DB SNR", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 32, no. 12, 1 December 1997 (1997-12-01), pages 1896 - 1906, XP000767440, ISSN: 0018-9200
PATENT ABSTRACTS OF JAPAN vol. 011, no. 396 (E - 568) 24 December 1987 (1987-12-24)
PATENT ABSTRACTS OF JAPAN vol. 011, no. 396 (E - 568) 24 December 1987 (1987-12-24)
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