Title:
DETECTING HARDWARE FAULTS IN DATA PROCESSING PIPELINES
Document Type and Number:
WIPO Patent Application WO/2023/206346
Kind Code:
A1
Abstract:
A system comprises at least one circuit to detect whether a fault has occurred during performance of an operation by the at least one circuit. The at least one circuit generates error detecting values and determines a fault has occurred when the error detecting values do not match predetermined error detecting data.
Inventors:
ZHU RONGZHE (CN)
ZHANG SHANGANG (CN)
BALASUBRAMANYA NAGARAJU (US)
LU JINYUE (CN)
MIAO TINGHAI (CN)
ZHANG SHANGANG (CN)
BALASUBRAMANYA NAGARAJU (US)
LU JINYUE (CN)
MIAO TINGHAI (CN)
Application Number:
PCT/CN2022/090219
Publication Date:
November 02, 2023
Filing Date:
April 29, 2022
Export Citation:
Assignee:
NVIDIA CORP (US)
International Classes:
G01R31/28; G06F11/07; G06F11/08
Foreign References:
| EP2930524A1 | 2015-10-14 | |||
| CN111885368A | 2020-11-03 | |||
| EP0080354A2 | 1983-06-01 | |||
| CN1734424A | 2006-02-15 | |||
| US20190258251A1 | 2019-08-22 | |||
| JP2009223506A | 2009-10-01 | |||
| CN105843699A | 2016-08-10 | |||
| US20190051370A1 | 2019-02-14 | |||
| CN111212775A | 2020-05-29 | |||
| US5168499A | 1992-12-01 | |||
| JP2014146110A | 2014-08-14 |
Attorney, Agent or Firm:
P. C. & ASSOCIATES (CN)
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