ON OVERLAY METROLOGY DATA

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 62/464,382 filed on February 28, 2017, which is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

1. TECHNICAL FIELD

[0002] The present invention relates to the field of metrology, and more particularly, to measurement algorithms.

2. DISCUSSION OF RELATED ART

[0003] In the field of semiconductor metrology, metrology tools comprise an illumination system which illuminates metrology targets, a collection system which captures relevant information provided by the illumination system's interaction (or lack thereof) with a target, device or feature, and a processing system which analyzes the information collected using one or more algorithms. Metrology tools can be used to measure structural and material characteristics (e.g., material composition, dimensional characteristics of structures and films such as film thickness and/or critical dimensions of structures, overlay, etc.) associated with various semiconductor fabrication processes. These measurements are used to facilitate process controls and/or yield efficiencies in the manufacture of semiconductor dies.

[0004] The metrology tool is designed to make many different types of measurements related to semiconductor manufacturing such as characteristics of one or more targets, e.g., critical dimensions, overlay, sidewall angles, film thicknesses, line edge roughness, line width roughness pattern placement errors, or process-related parameters (e.g., focus and/or dose). The targets can include certain regions of interest that are periodic in nature, such as, for example, gratings in a memory die. The metrology targets may possess various spatial characteristics and are typically constructed of one or more cells which may include features in one or more layers which may have been printed in one or more lithographically distinct exposures. The targets or the cells may possess various symmetries such as twofold or four- fold rotation symmetry and/or reflection symmetry. Examples of such metrology structures are described in U.S. Patent No. 6,985,618 which is included herein by reference in its entirety. Different cells or combinations of cells may belong to distinct layers or exposure steps. The individual cells may comprise either isolated non-periodic features or alternately they may be constructed from one, two or three dimensional periodic structures or combinations of non-periodic and periodic structures as described in U.S. Patent Application Publication No. 2013/042,089 which is included herein by reference in its entirety. The periodic structures may be non-segmented, or they may be constructed from finely segmented features which may at or close to the minimum design rule of the lithographic process used to print them. The metrology targets may also be collocated or in close proximity with dummification structures in the same layer or in a layer above, below or in between the layers of the metrology structures. Targets can include multiple layers (or films) whose thicknesses can be measured by the metrology tool. Targets can include target designs placed (or already existing) on the semiconductor wafer for use, e.g., with alignment and/or overlay registration operations. Certain targets can be located at various places on the semiconductor wafer. For example, targets can be located within the scribe lines (e.g., between dies) and/or located in the die itself. In certain embodiments, multiple targets are measured (at the same time or at differing times) by the same or multiple metrology tools as described in U.S. Patent No. 7,478,019 which is included herein by reference in its entirety. The data from such measurements may be combined. Data from the metrology tool is used in the semiconductor manufacturing process for example to feed-forward, feed-backward and/or feed-sideways corrections to the process (e.g., lithography, etch) and therefore, might yield a complete process control solution.

SUMMARY OF THE INVENTION

[0005] The following is a simplified summary providing an initial understanding of the invention. The summary does not necessarily identify key elements nor limits the scope of the invention, but merely serves as an introduction to the following description. [0006] One aspect of the present invention provides a method comprising: deriving, from parameters of process-related line edge roughness (LER), an estimation of minimal dimensions of target elements required to comply with given measurement uncertainty specifications, and designing a metrology target to have target design parameters conforming with the estimated minimal dimensions, wherein at least one of the deriving and the designing is carried out by at least one computer processor.

[0007] One aspect of the present invention provides a method comprising: estimating a LER-related uncertainty error of CDSEM metrology metric values derived by SEM (scanning electron microscope) from a CDSEM (critical dimension scanning electron microscopy) target, by: estimating a range of variation of at least one stochastic parameter characterizing the LER, deriving, analytically and/or using simulation, an error resulting from the estimated range according to a given measurement model for the metrology metric values, and using the derived error to estimate the LER-related uncertainty error, wherein at least one of: the estimating, the deriving and the using is carried out by at least one computer processor.

[0008] One aspect of the present invention provides a method comprising: estimating an uncertainty error of optical metrology metric values due to LER by: estimating a range of variation of at least one stochastic parameters characterizing the LER, deriving, analytically or using simulation, an error resulting from the estimated range according to a given measurement model for the metrology metric values, and using the derived error to estimate the uncertainty error, wherein at least one of: the estimating, the deriving and the using is carried out by at least one computer processor.

[0009] One aspect of the present invention provides a method comprising: determining an impact of stochastic noise on a given overlay metrology data set, derived from applying a specified metrology model, by: generating a plurality of noise realizations of random synthetic noise, adding the generated noise realizations to the given overlay metrology data set to yield a modified data set, and using at least one metrology metric, comparing metric values for the given overlay metrology data set and for the modified data set, wherein the comparison provides an estimated noise impact on the given overlay metrology data set, and wherein at least one of: the generating, the adding and the comparing is carried out by at least one computer processor. [0010] These, additional, and/or other aspects and/or advantages of the present invention are set forth in the detailed description which follows; possibly inferable from the detailed description; and/or learnable by practice of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] For a better understanding of embodiments of the invention and to show how the same may be carried into effect, reference will now be made, purely by way of example, to the accompanying drawings in which like numerals designate corresponding elements or sections throughout.

[0012] In the accompanying drawings:

[0013] Figure 1 is a high-level flowchart illustrating a method, according to some embodiments of the invention.

[0014] Figure 2 provides an example for effects of stochastic noise of the OVL measurements on the OVL correctables, according to some embodiments of the invention.

[0015] Figures 3A-3C illustrate images of the OVL metrology targets having periodic structures with parallel edges, with schematic illustration for calculating a metrology metric therefrom, according to some embodiments of the invention.

[0016] Figures 4A illustrates the line edge roughness on the CDSEM image and different segmentations of the lithographic line-space pattern, according to some embodiments of the invention.

[0017] Figure 4B is a non-limiting example for defining an edge function e(y) for a line edge (edge contour curve), according to some embodiments of the invention.

[0018] Figure 4C is a schematic non-limiting example of the periodic structure with coarse pitch and the fine pitch segmentation.

DETAILED DESCRIPTION OF THE INVENTION

[0019] In the following description, various aspects of the present invention are described. For purposes of explanation, specific configurations and details are set forth in order to provide a thorough understanding of the present invention. However, it will also be apparent to one skilled in the art that the present invention may be practiced without the specific details presented herein. Furthermore, well known features may have been omitted or simplified in order not to obscure the present invention. With specific reference to the drawings, it is stressed that the particulars shown are by way of example and for purposes of illustrative discussion of the present invention only, and are presented in the cause of providing what is believed to be the most useful and readily understood description of the principles and conceptual aspects of the invention. In this regard, no attempt is made to show structural details of the invention in more detail than is necessary for a fundamental understanding of the invention, the description taken with the drawings making apparent to those skilled in the art how the several forms of the invention may be embodied in practice.

[0020] Before at least one embodiment of the invention is explained in detail, it is to be understood that the invention is not limited in its application to the details of construction and the arrangement of the components set forth in the following description or illustrated in the drawings. The invention is applicable to other embodiments that may be practiced or carried out in various ways as well as to combinations of the disclosed embodiments. Also, it is to be understood that the phraseology and terminology employed herein are for the purpose of description and should not be regarded as limiting.

[0021] Unless specifically stated otherwise, as apparent from the following discussions, it is appreciated that throughout the specification discussions utilizing terms such as "processing", "computing", "calculating", "determining", "enhancing", "deriving" or the like, refer to the action and/or processes of a computer or computing system, or similar electronic computing device, that manipulates and/or transforms data represented as physical, such as electronic, quantities within the computing system's registers and/or memories into other data similarly represented as physical quantities within the computing system's memories, registers or other such information storage, transmission or display devices.

[0022] Methods are provided for designing metrology targets and estimating the uncertainty error of metrology metric values with respect to stochastic noise such as line properties (e.g., line edge roughness, LER, line width roughness, LWR, and/or Pattern Placement Roughness, PPR). Minimal required dimensions of target elements may be derived from analysis of the line properties and uncertainty error of metrology measurements, by either CDSEM (critical dimension scanning electron microscopy) or optical systems, with corresponding targets. The importance of this analysis is emphasized in view of the finding that stochastic noise may have increased importance with when using more localized models such as CPE (correctables per exposure). The uncertainty error estimation may be used for target design, enhancement of overlay estimation and evaluation of measurement reliability in multiple contexts.

[0023] Embodiments of the present invention provide efficient and economical methods and mechanisms for the following issues and thereby provide improvements to the technological field of metrology: Enabling prediction and comparison of the impact of stochastic noise on different overlay models and sample plans; enabling an estimation of the impact of LER, LWR and/or PPR on overlay metrology results from a single target; enabling an estimation of the impact of LER, LWR or Pattern Placement Roughness on overlay metrology correctables given a specific overlay model and sample plan; and/or enabling an estimation of the LER, LWR, PPR or power spectral density (PSD) from an optical image of a test structure, target or device structure.

[0024] Disclosed methods (e.g., methods 100 illustrated in Figure 1 and the examples below) characterize the impact and cross relationship between different measured quantities provided by a metrology sensor and monitor, attenuate and/or prevent prior art uncontrollable effects of stochastic noise (see Figure 2 below). Moreover, disclosed methods mitigate the prior art risk that the number and spatial distribution of the sampling and/or the area/size of the measurement site/target proves insufficient to the effects of stochastic noise, and enable accuracy verification, post lithography overlay control, and post etch overlay control or lot dispositioning.

[0025] Moreover, disclosed methods may be configured to determine the required minimum size of metrology target(s) and/or device structure(s) from which metrology data is obtained under certain manufacturing conditions as determined by measured quantities from same or other metrology target(s) and/or device structure(s).

[0026] In certain embodiments, methods 100 may comprise any of: determining the impact of stochastic noise on overlay metrology data set, determining the impact of LER and/or PSD on minimum required target size or measurement area of an optical or SEM based overlay measurement and/or estimating LER/PSD from an optical metrology measurement, as disclosed below. [0027] Figure 1 is a high-level flowchart illustrating a method 100, according to some embodiments of the invention. The method stages may be carried out with respect to metrology tools and/or modules, which may optionally be configured to implement method 100. Method 100 may comprise the following stages, irrespective of their order.

[0028] In certain embodiments, method 100 comprises determining an impact of stochastic noise on a given overlay metrology data set, derived from applying a specified metrology model (stage 105), by generating a plurality of noise realizations of random synthetic noise (stage 110), e.g., using measured and/or simulated metrology results (stage 112), adding the generated noise realizations to the given overlay metrology data set to yield a modified data set (stage 120), and using at least one metrology metric, comparing metric values for the given overlay metrology data set and for the modified data set (stage 130). Comparison 130 may be used to provide an estimated noise impact on the given overlay metrology data set. In certain embodiments, the magnitude of the random noise may be varied to observe the impact on metrology metrics such as the 3sigma of the result, and the corresponding metric(s) may be compared for different models - to estimate any of a minimum sample plan and a maximum tolerable stochastic noise for each overlay correctable control model and/or a resulting uncertainty specification for the specified metrology model. In certain embodiments, an analytical expression for the 3sigma or other metric(s) may be derived at least for some specific (e.g., linear) wafer/field term models. For linear models, probably a kind of equipartition of the noise can be anticipated.

[0029] Method 100 may further comprise estimating the noise impact on the specified metrology model (stage 150) by estimating the noise impact on multiple given overlay metrology data sets derived by applying the specified metrology model (stage 155).

[0030] Method 100 may further comprise optimizing parameters of the specified metrology model by comparing the noise impact on the specified metrology model, implemented with different parameter values (stage 160). Method 100 may further comprise deriving an analytic expression for the dependency of the estimated noise impact on model parameters (stage 170). Model parameters may comprise, e.g., at least a sample size, a maximum tolerable stochastic noise and/or a resulting uncertainty specification for the specified metrology model. [0031] Any of the stages of method 100, e.g., generating 110, adding 120 and comparing 130, may be carried out by at least one computer processor. Method 100 may be at least partially implemented by at least one computer processor, e.g., in a metrology module. Certain embodiments comprise computer program products comprising a computer readable storage medium having computer readable program embodied therewith and configured to carry out the relevant stages of method 100. Certain embodiments comprise metrology module(s) which comprise elements of the disclosed computer program products.

[0032] Disclosed embodiments of methods 100 overcome and/or control prior art risks due to intrinsic stochastic noise per-target and its effect on calculated metrology metrics, e.g., in current optical or SEM (scanning electron microscopy) -based overlay metrology. Alternatively or complementarily, certain embodiments comprise lower bounds on target element dimensions and/or stochastic noise levels which enable use of noise-sensitive procedures while limiting the impact of stochastic noise on the results, as explained below.

[0033] Figure 2 provides an example for effects of stochastic noise in OVL measurements, according to some embodiments of the invention. Figure 2 illustrates a non-limiting example of the impact of stochastic variations on the OVL (overlay) correction from the HO (higher order) wafer models in comparison to the impact of stochastic variations on the OVL correction from CPE (correctables per exposure) wafer models, in general terms.

[0034] Figure 2 represents the results of Monte Carlo simulations of the effect of the random noise added to the measured/simulated OVL values on ca. 550 wafer sites, in terms of the metrology metric pooled3sigma. The simulated noise was independent identically distributed Gaussian noise with three different values of the STD (standard deviation), 0.5nm, 0.4nm and 0.3 nm, indicated as Noisel ..3, respectively. For each noise level, the pooled variances of the modeled overlay per site was calculated over 100 realizations both for the HO (W3F1 high order - wafer third order correction and field first order correction) wafer model and the CPE model. The resulting 3-sigma (pooled3sigma) are compared in Figure 2. It shows that HO-modeled overlay remains much more stable compared to that of the CPE-modeled overlay. Without being bound by theory, the inventors suggest that the higher sensitivity of CPE models to stochastic noise is inherent, because the HO model averages the effect of the noise across the entire wafer (e.g., ca. 550 sites), while the CPE model treats every field independently (e.g., ca. 9 sites), which results in higher variation of the modeled OVL variance. The resulting 3Sigma variations, i ^" o _mod can be estimated in terms of the variance of the original noise o _Noise , the number of the sites per fit N _S j _te and the number of the model terms N as in Equation 1.

Equation 1

For example, in the above example N _terms = 10, N _sites = 550 for HO model, and Nterms ⁼ 3, N _sites = 9 for the CPE HO model. For Noisel with o _Noise = O.Snm, the above equation predicts (3a _{mod HO} = 0.2nm and (3a _{mod CPE} = 0.87nm, which agrees with the results of the numerical Monte Carlo simulation in Figure 2.

[0035] As illustrated in the example above, when correction per exposure models and control techniques are used in overlay metrology, the presence of random (stochastic) noise can have a detrimental effect on the fidelity of the correctables generated from the overlay data. Additional analysis is provided in Adel at al. 2017, Impact of stochastic process variations on overlay mark fidelity "towards the 5nm node", Proc. SPIE 10145, Metrology, Inspection, and Process Control for Microlithography XXXI, 1014509, which is incorporated herein by reference in its entirety.

[0036] The example in Figure 2 demonstrates that the industry transition from HO wafer- level models to CPE field-level models, or to any other model which drastically increases the ratio of number of the correctables to the number of sites from which the model terms are determined, leads to a higher and critical impact of the individual (overlay) mark fidelity or uncertainty on the correctable terms.

[0037] In certain embodiments, method 100 further comprises estimating a LER-related uncertainty error of CDSEM metrology metric values derived by SEM from a target (stage 180) by estimating a range of variation of stochastic parameter(s) characterizing the LER (or LWR or other parameters) (stage 182), deriving, e.g., using simulation and/or analytically, an error resulting from the estimated range according to a given measurement model for the metrology metric values (stage 184) and using the derived error to estimate the LER-related uncertainty error (stage 186). Certain embodiments comprise estimating a quality of optical metrology measurements of metrology targets with respect to the estimated uncertainty error of corresponding CDSEM metrology metric values of the metrology targets (stage 190). For example, in case the CDSEM measurements have an inaccuracy of e.g., several 0. lnm, it may be taken into account when comparing the optical measurements to the CDSEM measurement.

[0038] Certain embodiments comprise estimating LER-related uncertainty error for multiple measurement models based on a single target uncertainty (sage 191). In certain embodiments, method 100 further comprises comparing the estimated uncertainty error for multiple measurement models and selecting one of the measurement models which has the LER-related uncertainty error complying with a given required specification (stage 192), for example, the multiple measurement models comprise at least HO and CPE models. In certain embodiments, method 100 further comprises determining an optimal model complexity of a corresponding measurement model (e.g., the number of parameters in CPE) with respect to the derived error (stage 194).

[0039] In certain embodiments, method 100 may be applied to optical overlay measurements with respect to the corresponding measurement model (stage 195), and along similar lines as disclosed above, e.g., in stages 182-194.

[0040] Advantageously, disclosed method 100 overcomes prior art shortcoming of performing overlay metrology measurements without achieving the minimum desirable uncertainty or fidelity in the data source due to either under-sampling or intrinsic stochastic noise in the image or scatterometry data used for overlay metrology.

[0041] As a non-limiting example for implementing methods 100, cases of estimation of the LER, LWR, PSD and other stochastic characteristics of edges of manufactured features are presented below, focusing on LER as the leading non-limiting example. In particular, method 100 comprises the determination of these and/or corresponding parameters on the minimum required target size or measurement area of an optical or SEM based overlay measurement. Embodiments of methods 100 incorporate these estimators and metrics to predict the impact of the estimated parameters (e.g., LER) on overlay metrology measurement and control parameters using the disclosed approach.

[0042] In certain embodiments, method 100 may comprise determining the impact of line edge roughness (LER, as the stochastic noise) on an overlay metrology data set derived using a metrology model (stage 210) by generating multiple noise realizations simulating the impact of the LER on the edge detection results (stage 220) to detect line edge positions of target elements (stage 230) and possibly estimate a minimal target and/or device size for given manufacturing conditions (stage 240).

[0043] Certain embodiments comprise segmented overlay targets (as metrology targets), having periodic and segmented structures, with segmentation parameters (as target design parameters) conforming with the estimated minimal dimensions derived by methods 100.

[0044] Advantageously, embodiments of disclosed method(s) 100 use results of the LER and its statistical properties such as variance, correlation function, correlation length, or PSD (Power Spectrum Density), derived, e.g., from SEM images to predict the minimum required size(s) of metrology target(s) and/or device structure(s) from which metrology data is obtained under certain manufacturing conditions as determined by measured quantities from the same or from other metrology target(s) or device structure(s). Additional examples are provided in Adel at al. 2017, Impact of stochastic process variations on overlay mark fidelity "towards the 5nm node", Proc. SPIE 10145, Metrology, Inspection, and Process Control for Microlithography XXXI, 1014509, which is incorporated herein by reference in its entirety.

[0045] In the following, a detailed non-limiting example for determining of the minimal required target size based on the statistical properties of the LER is provided. Initially, the target bar edge contours are extracted from the SEM image by an edge-detection algorithm and the extracted contours are used to analyze the LER properties (see Figure 4B as a non- limiting example). It is noted that the edge-detection algorithm may be the same or be performance-wise equivalent algorithm as is used for the edge extraction for the OVL/Registration metrology purposes. The metrology target (also termed below - the metrology mark, and see Figure 3A for a non-limiting example) may comprise, in a non- limiting example, structural elements with parallel edges. The metrological objective, or part of it, is to determine the average position X _c of the edges along the direction perpendicular to the edges. Method 100 comprises algorithms for geometries other than the parallel line structure, which may e.g., be derived from the algorithm presented below straightforwardly.

[0046] Figures 3A-3C illustrate image of metrology target 95 having periodic structures with parallel edges 97, with schematic illustration for calculating a metrology metric therefrom, according to some embodiments of the invention. Figure 3A illustrates metrology target 95. The periodic structures of targets 95 are characterized by a coarse pitch, and may be further segmented by a fine segmentation pitch into finer periodic structures, composed of target elements (see e.g., Figures 4A and 4C). The fine segmentation increases the effect of line edge characteristics, as explained and analyzed below. Figure 3B illustrate regions of interest (ROIs) 98 defined on targets 95. Figure 3C provides an example for the calculation of kerneBsigma (K3S) as a non-limiting example for a metrology metric, the K3S metric indicating the mark (target) fidelity.

[0047] Imaging Based Overlay (IBO) relies on the determination of the center of symmetry X _c of the images of the structures (e.g., periodic grating) constituting the overlay mark, Figure 3B (for the details see U.S. Patent No. 6921916 and U.S. Patent Application Publication No. 20070008533, incorporated herein by reference in their entirety). This center of symmetry can be found by looking for the maximum of the auto -convolution function of the image. The region of interest (ROI) 98 shown in Figure 3B selects the part of the structure in the given process layer (e.g., a resist layer) designated for the overlay measurement in x-direction. The selected image area is projected on the x-axis by averaging over the transverse y-direction to produce a one-dimensional (ID) "kernel". As a non-limiting method, the center of the symmetry of this kernel can be found as a maximum of its auto-convolution. The corresponding procedure is then repeated for the second process layer (e.g., the previous layer), to eventually find the overlay between the two.

[0048] The K3S measure is introduced in order to characterize the non-uniformity of the overlay mark (as described in WIPO Application No. PCT US2017/057767, incorporated herein by reference in its entirety). The nominal ROI (Figure 3B) 98 is subdivided into N (typically ca. 5-10) sub-ROI's 99 as shown in Figure 3C, which are paired symmetrically (indicated by corresponding letters A, B, C, D in Figure 3C). Each sub-reg is used to find its own center of the symmetry, which yields N values denoted ■ _> ^me

variance of which defines the K3S, namely K3S = 3 · 5TD (¾).

[0049] Figures 4A-4C illustrate a non-limiting example for a SEM image of a metrology target 95 having periodic structures with parallel edges 97, according to some embodiments of the invention. Figures 4A illustrates the line edge roughness on the CDSEM image and different segmentations of the lithographic line-space pattern, according to some embodiments of the invention. Figure 4B is a non-limiting example for defining an edge function e y) for a line edge (edge contour curve), according to some embodiments of the invention. Figure 4C is a schematic non-limiting example of the periodic structure with coarse pitch and the fine pitch segmentation.

[0050] Figure 4B is a non-limiting example for defining an edge function e(y) 115 for a line edge 97 (edge contour curve), extracted from the SEM image using some edge detection algorithm, according to some embodiments of the invention. The statistical properties of the LER can be derived from the edge function e(y). The important and relevant characterization of the LER is given by its correlation function C(y'— y")≡ (ej(y')e (y")), where (... ) denote a statistical averaging, the local variance o _ER = C(0), and the correlation length < extracted from the above correlation function (for further details on the LER properties see, e.g., Chris A. Mack, "Analytical Expression for Impact of Linewidth Roughness on Critical Dimension Uniformity", Journal of Micro/Nanolithography, MEMS, and MOEMS, 13(2), 020501 (2014)).

[0051] The LER phenomenon imposes the uncertainty σ _χ (the Standard Deviation) on the value of X _c (the average position of edges 97 along the direction perpendicular to the edges, which is a basic constituent of metrology metrics such as the overlay). The relation between the LER properties and σ _χ is given below and is proposed to use for the determination of the minimal metrology target size satisfying the requirement of the uncertainty specification provided in Equation 2 (see e.g., stage 240):

0 _Xq < O _spec Equation 2

[0052] For a single line segment i of the length L, its transverse position x _t may be determined as a mean value of its edge function e(y), defined in e.g., in Figure 4B - as provided by Equation 3.

j = Ζ ¹ J ^L dy 6 _j (y) Equation 3

[0053] The corresponding statistical uncertainty σ _χ of the transverse position x _t of the edge contour can be expressed in two equivalent ways, as indicated in Equation 4,

Equation 4 in which C(y'— y") = (^(y ^ _/ C ")) is the correlation function of the LER function (assuming stationary process) and 5(/c) is its corresponding Power Spectrum Density (PSD). Both functions contain the same information and are related by the Fourier transform. They may be obtained by the analysis of the edge contours extracted by the assumption in the edge-detection algorithm. The important parameter is the correlation length < which determines the spatial scale of the decay of the correlation function C(y) or, equivalently, the cutoff frequency of the PSD 5(/c) .

[0054] In many cases, LER correlation function may be approximated by the exponential form, presented in Equation 5.

c y' - y") = °l _ER e y'-y'' l/ξ Equation 5

(for further details on the LER properties see, e.g., Chris A. Mack, "Analytical Expression for Impact of Linewidth Roughness on Critical Dimension Uniformity", Journal of Micro/Nanolithography, MEMS, and MOEMS, 13(2), 020501 (2014)).

[0055] In the special limiting cases specified in Equation 6, the above expressions for o (L) may be simplified, or approximated as expressed in Equation 6, e.g., using

Equation 6

[0056] In cases that the LER correlation function can be described by the exponential form as in Equation 3, the uncertainty single edge position is given explicitly by Equation 7. o (L) = a _L ² _ER · [l - - ^K (1 - e ^~L ^ Equation 7 which is consistent with the general limiting expressions in Equation 6. [0057] If metrology mark 95, or a part of it, consists of 2N statistically equivalent edges of the length L each, the uncertainty of their mean position X _c =—∑i= _i ^x i is expressed in

Equation 8.

Equation 8

I2N

[0058] Using Equation 4, the optimal parameters N, L of the minimal metrology mark may be obtained, as expressed in Equation 9.

-j=≤ Osvec Equation 9

[0059] In the special case L » of Equation 7, the (in general non-trivial) condition on N and L becomes a condition on the product N X L (e.g., the total integral edge length), as expressed in Equation 10. Equation 10

where 5(0) = 2ξσ _ΕΚ . This condition provides a minimal required value of the product of

5(0)

the number of the lines N and the line length L: (L X JV)

[0060] The determination of the minimal size of the periodic-structure-target based on the intra-target CD uniformity (CDU, see, e.g., Chris A. Mack, "Analytical Expression for Impact of Linewidth Roughness on Critical Dimension Uniformity", Journal of Micro/Nanolithography, MEMS, and MOEMS, 13(2), 020501 (2014)) may be carried out by relating the CDU to the LER of the two edges of the measured bars.

[0061] The single edge position uncertainty can be inferred from the Line Width Uncertainty (LWU) as expressed in Equation 11.

a _x (V) = y[2 x CDU Equation 11

[0062] Then, the condition on the minimal number of the lines can be expressed as in Equation 12.

_{Λ 7} ^ CD U ²

TV >— 2 Equation 12

°spec here the CDU already contains the information about the length L of the bar (therefore L does not appear explicitly in Equation 12).

[0063] The generalization of the above estimation of the minimal required size of the SEM metrology target to the arbitrary target geometry is straightforward.

[0064] Certain embodiments comprise estimating a lower bound for an optical metrology measurement (e.g. OVL, K3S etc.) from the LER properties.

[0065] In certain embodiments, the LER contribution to the uncertainty of an optical metrology measurement (e.g., OVL, K3S etc.) may be estimated from the LER and/or its PSD. In certain embodiments, the uncertainty of the plane of the symmetry of the symmetric periodic structure may be extracted from the image created by an optical microscope (see Figure 3A and Figure 4C for a non-limiting example of such structures). In certain embodiments, for segmented periodic structures such as illustrated in Figure 4C, the uncertainty σ _χ of the position of the plane of the symmetry of the imaged gratings may be expressed by the approximate parametric relation in terms of the LER properties, target design parameters and the optical system properties, as provided in Equation 13.

[0066] In Equation 13, L _x , L _y denote the dimensions of the periodic grating, P, CD are the coarse pitch and its CD in the x-direction, Ρ _ηβ , CDf _ine are the fine segmentation pitch and CD (see Figure 4C), and P _c is the cut-on pitch of the optical MTF (it is assumed here that P _c /P is of the order of unity). Equation 13 relates the uncertainty σ _χ to the following factors: (L _x /P) being the ratio of the grating length to the coarse pitch expresses the number of the coarse bars; (CD /P _Fine ) being the ratio of the coarse CD to the fine segmentation pitch expresses the number of the fine segmentation lines per one coarse bar; (Pc/P ^' ) being the ratio of the optics PSF "cutoff Pitch to the grating Pitch expresses the low-pass effect of the imaging; and (PFine/CD _Fine ) describes the duty cycle of the fine segmentation which affect the kernel contrast. The uncertainty o _Xc of the optical metrology may be used to estimate the lower bound on the target fidelity metric Kernel-3-Sigma (see WIPO Application No. PCT/US2017/057767, incorporated herein by reference in its entirety), and be used as an indicator of the size of errors associated with metrology metrics, as provided e.g., in U.S. Application Publication No. US20140136137, which is incorporated herein by reference in its entirety.

[0067] In certain embodiments, method 100 further comprises deriving, from parameters of process-related LER, minimal dimensions of target elements required to comply with given measurement uncertainty specifications (stage 250), designing a metrology target (e.g., segmented overlay targets having periodic and segmented structures) to have target design parameters (e.g., segmentation parameters) conforming with the estimated minimal dimensions (stage 260) and possibly estimating an uncertainty error of overlay measurements of the designed target, which is due to the LER (stage 270), which may serve as a lower bound for metric values such as K3S demonstrated above.

[0068] In certain embodiments, an upper bound on LER and/or its PSD may be estimated from optical metrology measurement(s) by extracting LER and/or PSD estimations using given existing high resolution optical image of metrology or device structure. For example, upper bound estimation(s) for LER may be derived from metrology metrics such kernel 3 sigma and/or optical contrast of the target structure by reversing the expression in Equation 13.

[0069] Aspects of the present invention are described above with reference to flowchart illustrations and/or portion diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each portion of the flowchart illustrations and/or portion diagrams, and combinations of portions in the flowchart illustrations and/or portion diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general-purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or portion diagram or portions thereof.

[0070] These computer program instructions may also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or portion diagram or portions thereof.

[0071] The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or portion diagram or portions thereof.

[0072] The aforementioned flowchart and diagrams illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each portion in the flowchart or portion diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the portion may occur out of the order noted in the figures. For example, two portions shown in succession may, in fact, be executed substantially concurrently, or the portions may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each portion of the portion diagrams and/or flowchart illustration, and combinations of portions in the portion diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

[0073] In the above description, an embodiment is an example or implementation of the invention. The various appearances of "one embodiment", "an embodiment", "certain embodiments" or "some embodiments" do not necessarily all refer to the same embodiments. Although various features of the invention may be described in the context of a single embodiment, the features may also be provided separately or in any suitable combination. Conversely, although the invention may be described herein in the context of separate embodiments for clarity, the invention may also be implemented in a single embodiment. Certain embodiments of the invention may include features from different embodiments disclosed above, and certain embodiments may incorporate elements from other embodiments disclosed above. The disclosure of elements of the invention in the context of a specific embodiment is not to be taken as limiting their use in the specific embodiment alone. Furthermore, it is to be understood that the invention can be carried out or practiced in various ways and that the invention can be implemented in certain embodiments other than the ones outlined in the description above.

[0074] The invention is not limited to those diagrams or to the corresponding descriptions. For example, flow need not move through each illustrated box or state, or in exactly the same order as illustrated and described. Meanings of technical and scientific terms used herein are to be commonly understood as by one of ordinary skill in the art to which the invention belongs, unless otherwise defined. While the invention has been described with respect to a limited number of embodiments, these should not be construed as limitations on the scope of the invention, but rather as exemplifications of some of the preferred embodiments. Other possible variations, modifications, and applications are also within the scope of the invention. Accordingly, the scope of the invention should not be limited by what has thus far been described, but by the appended claims and their legal equivalents.