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Patent Searching and Data


Title:
DEVICE INTEGRATING A JUNCTION FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2018/041208
Kind Code:
A1
Abstract:
Provided is a device integrating a junction field effect transistor. The device is divided into a JFET area and a power device area, and the device comprises: a drain (201) having a first conductivity type, a portion of the drain (201) being in the JFET area and another portion in the power device area; and a first conductivity type area (214) disposed on a front surface of the drain, a portion of the first conductivity type area (214) being located in the JFET area and another portion being located in the power device area. The JFET areas further comprises: JFET source (208) having a first conductivity type; a first well (202) having a second conductivity type, disposed in the first conductivity type area (214) and formed on both sides of the JFET source (208); a metal electrode (212) formed on the JFET source (208) and in contact with the JFET source (208); a JFET metal gate (213) disposed on the first well (202) on two sides of the JFET source (208); and a first clamp area (210) located under the JFET metal gate (213) and within the first well (202), being of the second conductivity type, and ion concentration thereof being greater than that of the first well.

Inventors:
GU YAN (CN)
CHENG SHIKANG (CN)
ZHANG SEN (CN)
Application Number:
PCT/CN2017/099860
Publication Date:
March 08, 2018
Filing Date:
August 31, 2017
Export Citation:
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Assignee:
CSMC TECHNOLOGIES FAB2 CO LTD (CN)
International Classes:
H01L27/06; H01L27/02; H01L29/06
Foreign References:
CN101127327A2008-02-20
CN104009088A2014-08-27
CN203644787U2014-06-11
JPS63266882A1988-11-02
US20130082320A12013-04-04
Other References:
See also references of EP 3509101A4
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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