The present invention also relates to a device for frequency conversion of a radio signal, and a radio device for transmitting speech and/or data communication over a radio connection.

BACKGROUND OF THE INVENTION AND DESCRIPTION OF RELATED ART There is often a need in radio techniques to generate high frequency signals as, for example, in a transmitter or in a receiver where a so-called local oscillator is used in order to convert an incoming signal from an antenna to an intermediate frequency (heterodyne reception). In frequency conversions, two frequencies are generated which correspond to the sum of the frequency of the incoming signal and the frequency of the local oscillator, respectively the difference between these frequencies. In order to achieve a good separation of the two generated frequencies, normally a local oscillator frequency with the same order of size as the frequency of the incoming signal is chosen.

In many cases there is a need to be able to multiply the local oscillator's frequency before the frequency conversion by means of a device so that the output signal has a

frequency N f,, where N is an integer and f0 is the input signal frequency. Such a frequency multiplication is normally produced by means of non-linearities in active components, such as field effect transistors or bipolar transistors, or alternatively by using non-linearities in a diode.

A common way of producing a doubling or tripling of a frequency is to use the active component in an amplifier circuit and to bias the components close to choking so that the output signal is clipped and thereby distorted and rich in harmonics. This type of frequency multipliers, however, suffers from a number of problems. The electrical stability can, for example, be a sensitive point, as self-oscillation can occur with certain biasings or power levels.

Furthermore, there is a risk in, e.g., actively coupled field effect transistors for electrical breakdown in the reversed direction on the gate electrode with accompanying reliability problems for the component in question.

Furthermore, these active frequency multiplier's performance is sensitive to variations of the input power and the transistor parameters.

Diodes can also be used for frequency multiplication of frequencies up to and over one terahertz. They, however, require relatively high input power and often have a low conversion efficiency, i.e., the part of the input power which is transferred to power at the desired frequency is relatively low. In future radio systems in the microwave region it is expected that the microwave circuits to a high degree will be constructed of monolithic microwave integrated circuits, MMIC. These are normally optimised with

reference to the active components, i.e., the transistors, whereas the diodes on an MMIC normally are not as good as discrete diodes, as both the ideality factor and the series resistance are considerably higher. By ideality factor is meant the constant whereby the ideal diode equation can be adapted to a diode's true characteristic.

In the American Patent US 4 907 045 a frequency multiplier is presented in which a channel in a field effect transistor-like semiconductor component is used as a passive non-linear component. By passive is meant that no or a negligibly amount of DC-power is consumed for the component's or the device's function. Through the use of tunnelling effects, regions with a negative conductance are obtained in the component's current-voltage characteristic so that the current through the component alternately rises and falls with linearly increasing voltage over the component. When a periodic voltage with a frequency fIN is applied over the component, a current is generated which even without filtering is dominated by harmonics of the frequency fIN. The component described requires a special semi-conductor structure which is complicated to produce and which is not commercially available. Because the components further have negative differential conductance, there is inevitably a risk for self-oscillation at some frequency.

In the American Patent US 4 734 591, an active frequency doubler is presented which is built around an FET-transistor with two gates in an amplifier circuit with a common source.

An input signal is coupled to both these gates in such a way that a phase difference of 180 results between the two gate voltages. With suitable biasing of the FET-transistor's

channel, the current through the channel will be dominated by a frequency component with a frequency twice as high as that of the input signal. Like all active frequency multipliers, the technique described in this document has the obvious disadvantage that it consumes power. Further, active frequency multipliers always result in stability problems. Frequency multipliers tend, in some situation, to become unstable and begin to oscillate.

SUMMARY OF THE INVENTION It is, as mentioned above, in many situations desirable to be able to produce a device and a method for performing a frequency multiplication, i.e., to generate an output signal starting from an input signal, where the input signal and output signal each comprise at least one frequency component, and where each frequency component of the output signal is a multiple of a frequency component of the input signal. It is especially desirable to make possible frequency multiplication where high conversion efficiency and absolute electrical stability are combined. It is further a desire that the device and method should be applicable for micro- and millimetre wave frequencies. It has previously been a problem to fulfil these desires.

The present invention solves this problem applying so-called resistive frequency conversion. The principle is that the signal which is to be multiplied is applied to a time variable conductance. The invention is founded on that this conductance is induced to vary with the input signal's own frequency. Such a conductance is achieved in the present invention by means of a transistor having a control

electrode to which the input signal is applied. In this way, currents and voltages are generated which are multiples of the input signal's frequency components, i.e., the signal <BR> <BR> <BR> power is produced at the frequencies N fi, N . f2,.., N. fn,<BR> <BR> <BR> wherein 1, 2 . . / fn are the frequency components of the input signal and N is a positive integer. It is possible to produce such a conductance with the help of a field effect transistor where the conductance is formed by the transistor's so-called channel between the source and the drain of the field effect transistor. This conductance is induced to vary with the frequency of the input signal by simultaneously applying the input signal to the gate of the transistor. The resulting conductance will consequently vary with a time period which is essentially identical with that of the applied gate voltage.

As the transistor's channel conductance is used for frequency multiplication and the transistor works in the resistive region, no direct voltage is required to be applied between drain and source, which means that the circuit does not require any DC-power. Without DC-power, the circuit has an amplification which is constantly less than one and is thus always electrically stable. Furthermore, the channel conductance is relatively easy to adapt to the desired impedance level, such as, e.g., to 50 ohms, for minimizing reflections. Through varying the DC-bias on the gate electrode it is possible to electrically vary the impedance level.

An object of the present invention is consequently to produce a device and a method for, when starting from an input signal, generating a signal of which the dominant

frequency is a multiple of the dominant frequency of the input signal in such a way that a good conversion efficiency is obtained.

Another object of the invention is to produce a device and a method for frequency multiplication where the device shall be unconditionally electrically stable, should not consume any DC-power worth speaking of, have a high tolerance for parameter variations, and be simple to construct and implement as a monolithic integrated circuit for microwaves (MMIC) A further object of the invention is to produce a passive device for frequency multiplication where the device is suitable for series connection of identical units for producing higher frequency components.

A further object of the present invention is to produce a device for frequency conversion of a high-frequency radio signal, i.e., transferring a radio signal's information content from one part of the frequency spectrum to another part of the frequency spectrum.

Yet another object of the present invention is to produce a device for transmitting speech and/or computer communication over a radio connection on wave lengths where oscillators with high requirements for phase noise are difficult to produce.

A central advantage of the present invention is that the frequency multiplier is well suited for being produced as a monolithic integrated microwave circuit MMIC.

Another advantage of the present invention is that the connection between input and output power during frequency multiplication remains essentially linear until saturation occurs, which permits regulation of the output effect.

Another advantage of the invention is that the output power at the desired frequency component from the frequency multiplication is able to be controlled by the DC-bias on the control electrode, which gives a possibility of output power control if an AGC-function is desired.

Another further advantage of the present invention is that the impedance levels during frequency multiplication are easily adapted to the desired level for minimizing reflections.

Yet another advantage of the present invention is that it permits frequency multiplication where the generated power at non-desired frequency components is held at a low level, which simplifies the filtering out of the desired frequency components.

The invention will be described in more detail below with the help of examples of embodiments with reference to the appended drawings.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a signal diagram which shows the current-voltage characteristic for a field effect transistor.

Figure 2 is a block diagram illustrating a preferred embodiment of the invention.

Figure 3 is a signal diagram which shows the current-voltage characteristic for a field effect transistor for the embodiment in Figure 2.

In Figure 4 is shown a signal diagram which illustrates the relationship between signals on an input and output for the embodiment in Figure 2.

Figure 5 is a block diagram illustrating an alternative embodiment in relation to the embodiment which is illustrated in connection to Figure 2.

Figure 6 is a general scheme for a power distributor for the microwave region.

In Figure 7 is shown a block diagram of a frequency tripler designed in accordance with the present invention where two field effect transistors are connected in series.

In Figure 8 is shown a signal diagram which illustrates the relationship between signals on an input and output for the embodiment in Figure 7.

In Figure 9 is shown a block diagram of a frequency tripler designed in accordance with the present invention, where two field effect transistors are connected in parallel.

In Figure 10 is shown a signal diagram which illustrates for the example of an embodiment in Figure 9 the relationship between the voltage over the transistor channels, the transistor's channel conductance time function and the resulting current through the transistor channels.

In Figure 11 is shown an overall diagram which illustrates a superheterodyne receiver which embraces a frequency multiplying device which multiplies a local oscillator frequency.

In Figure 12 is shown an overall block diagram which illustrates an example of a balanced frequency multiplier designed in accordance with the present invention.

Figure 13 is a block diagram illustrating a radio link constructed in accordance with the present invention.

Figure 14 is a block diagram illustrating a simple embodiment of a frequency multiplier according to the present invention.

Figure 15 is a signal diagram which illustrates the function of the embodiment presented in connection to Figure 14.

DETAILED DESCRIPTION OF EMBODIMENTS In a passive diode-based frequency multiplier according to the prior art, an input signal in the form of a sinusoidal voltage is applied to a non-linear component constituted by a diode. An output signal is extracted from the current which is produced in this way. As the diode has a periodic voltage applied by the input signal, the conductance of the diode, because of the diode's non-linear characteristic, will vary with the same period as the input signal.

The current through the diode is by definition the equal to the diode's conductance multiplied by the voltage across the diode. If the diode's conductance were proportional to the input signal, the current through the diode, in analogy with

the principle for a frequency mixer in which two frequencies are multiplied in order to produce the sum and difference frequencies, would be sinusoidal with a frequency twice as high as the input signal. However, the relationship between the conductance of the diode and the input signal is far from linear. Consequently, the conductance of the diode as a function of time will contain a large number of frequency components. Thus, the output signal will also contain a number of frequency components. Only a small part of the output signal's power will be found in the desired frequency component, which implies a relatively low efficiency. This principle of inducing a component's conductance to vary with the same period as the voltage over the component, thereby producing currents and voltages with frequencies which are multiples of the input signal frequency, can be called resistive frequency conversion.

Figure 1 shows a field effect transistor's current-voltage characteristic in the forward direction of the transistor. A current IDS through the transistor's channel from its drain to its source is shown here as a function of a voltage UDS between the drain and the source at a number of discrete values for the voltage Uos between the transistor's gate and its source. The working region of the transistor is traditionally divided up into a resistive region and a saturation region, which are shown in the Figure. As the Figure further suggests, the transistor's conductance, which corresponds to the slope dIDS/dUDs of the curve in the Figure, is mainly proportional to the voltage Ucs in the resistive region. This relationship applies especially well for small values of the voltage UDS, but is also an adequate

description of the transistor's conductance for each value of the voltage UDS within the resistive region. The current- voltage characteristic in this Figure 1 applies for an MOS- field effect transistor (Metal Oxide Semiconductor) but the same relationship also applies approximately for other types of field effect transistors.

The channel's conductivity changes in the resistive region can simplifiedly be explained through the channel's cross- section depending on the voltage Ucs, by the transistor channel being narrowed in proportion to the value of the voltage Ucs. From this simple model, two extreme values of the channel conductance can be seen: when the channel is completely cut off, and when the full cross-section of the channel can be used. As mentioned, the conductance is, between these two extreme values, essentially proportional to the voltage U05 between the gate and the source.

A field effect transistor's channel between the drain and the source can consequently be used as a controllable conductance. By applying the same voltage, with a suitable biasing, to the field effect transistor's gate, as is applied across the transistor's channel, a conductance is obtained which varies with the same period as the applied voltage. This conductance can be induced to vary essentially linearly with the voltage U05 between the gate and the source so that the conductance as a function of time becomes sinusoidal. If the voltage over the channel can also be considered to be sinusoidal, the current generated by this method will be the sum of a number of frequency components, of which the second harmonic, which corresponds to twice the frequency of the applied voltage, will form an significant

part of the total current. With a higher amplitude on the voltage U05 between the gate and the source, an approximately square-shaped conductance function can also be obtained. The field effect transistor then acts mainly as a switch which changes between high and low conductance. Furthermore, all shapes between a sinusoidal and an approximately square- shaped time function for the conductance are of course also conceivable.

In Figure 2 is shown a schematic embodiment according to the present invention. An essentially sinusoidal input signal IN with a frequency f0 is led via a buffer 1 and a first bandpass filter 2 to a drain D on a field effect transistor 5. A buffer's task is to isolate the buffer's input side from the influence of the circuit on its output. The buffer 1 is here realised by a simple amplifier stage.

In this embodiment, the field effect transistor is a GaAs- FET with a Schottky gate, a so-called MESFET (Metal Semiconductor Field Effect Transistor), which is well suited for integrated microwave circuits MMIC, but many other types of field effect transistors, such as for example a so-called HEMT (High Electron Mobility Transistor) or a MOSFET, are also conceivable in this connection. The field effect transistor 5 is further provided with a gate G and a source S. Between the drain D and the source S, the field effect transistor has a channel, the conductance of which depends on the voltage between the gate G and the source S. The source S is connected to earth. The drain D is also connected to a second bandpass filter 6. This second bandpass filter 6 has a central frequency which is twice as high as the central frequency of the first bandpass filter

2. The output signal 0 of the circuit is obtained on the output of the second bandpass filter 6.

The input signal IN is also connected to an adapter circuit 3 which adapts the voltage amplitude of the signal and phase shifts it with a phase angle p. With this phase angle , the relationship between the different generated frequency components can be influenced. For a frequency multiplier according to this embodiment of the invention, for good conversion efficiency, a phase angle g can advantageously be chosen to be approximately equal to 900 or 2700. The output of the adapter circuit 3 is connected with the gate G of the field effect transistor 5. Furthermore, the gate G has a bias voltage V0 applied via an inductor 4. This inductor 4 has a semi-insulating function through it having a high impedance for signal-frequency voltages and at the same time a low impedance for direct voltages.

Through the input signal IN, superimposed on a suitable bias voltage VG, being applied to the gate G of the field effect transistor, the conductance between the drain D and the source S of the field effect transistor will be induced to vary with the same frequency f0 as the input signal IN. The desired mixed product, which in this example is 2 f,, is extracted via the second bandpass filter 6 which lets the frequency 2 fro through to the output. The output power of the double frequency is also able to be controlled by the DC-bias on the gate G, which makes it possible to control the output power if an AGC-function (Automatic Gain Control) is desired. Furthermore, the connection between the input and output power is linear until the frequency doubler is

saturated, which is an advantage if one wishes to regulate the output power.

As the channel conductance of the transistor is used for the frequency multiplication and the transistor works in the resistive region, it is not necessary to apply a direct voltage between the drain D and the source S, which means that the circuit does not require any DC-power and thus is passive. From this also follows that the circuit has an amplification which is less than one and consequently always is electrically stable. The impedance levels furthermore lie on practical values and the channel conductance is relatively easy to adapt to the desired impedance level for minimizing reflections. By varying the DC-bias on the gate G, it is possible to electrically vary the channel impedance.

Greatly simplified, the conductance between the drain D and the source S, in the following called G(t) as a function of time t, for the sake of clarity can be considered to be directly proportional to the voltage between the gate G and the source S. If the input signal is purely sinusoidal with a phase frequency 0 and a suitable biasing is applied, the conductance G(t) can as an example of a conceivable function be written: G(t) G, [1 + cos ((o0t+(p)] where Gl denotes the average value of the conductance G(t), and (p denotes the phase difference between the conductance G(t) and the input signal. If the voltage between the drain D and the source S, which here has the reference uDs(t),

somewhat simplified can be considered to be directly proportional to the input signal IN, the following function for the voltage between the drain D and the source S is obtained: UDs(t)= Qcoso)0 t, where U1 denotes the amplitude of the voltage UDS (t) between the drain D and the source S. In this case, the following function for the current iDs(t) through the transistor channel is obtained: iDs(t)UDs(t) t)-G(t) = G1U1cos#t+ 1 [cos+cos(2co0t+)] 2 If the phase angle (p is 900, or alternatively 2700, the DC- component becomes zero: iDS(t) G1U1cosco0t + - sin2w0t.

The current iDs(t) consists consequently, according to this simplified calculation, of two frequency components: the base frequency and the second harmonic. Through the higher order frequency components being suppressed with this method, the filtering can be considerably simplified in relation to earlier known solutions.

In order to obtain higher conversion efficiency so that the power at the double frequency is maximised in relation to the delivered power, the relationship between the maximum value and the minimum value of the conductance should be as large as possible. This is achieved by means of a large amplitude on the voltage between the gate and the source so

that the conductance becomes approximately square-shaped. In this way, in addition to high power at the double frequency, power at the higher order frequency components is also obtained. The relationship between the different frequency components can be controlled through different phase shifts in the adapter circuit 3 and through varying the bias voltage V0 on the gate G so that the pulse relationship of the conductance as a function of time is changed. In this way, the frequency multiplier as illustrated in Figure 2 can by a suitable choice of the bandpass filters 2 and 6 also be used to generate the third harmonic, which corresponds to a frequency which is three times greater than the fundamental frequency, and thereby act as a frequency trebler.

With this embodiment, a conversion efficiency of approximately -5 dB can be produced. From this follows that a single transistor stage is sufficient for returning the voltage level to the signal level of the input signal. This can for example be achieved by means of a parallel feedback coupled FET on the output of the frequency multiplier according to known prior art per se, which gives a high band width and 6-10 dB amplification.

In Figure 3 is shown the current-voltage characteristic for a field effect transistor in a circuit according to the embodiment in Figure 2. The phase shift in the adapter circuit 3 is here equal to 900 and the channel conductance is induced to vary essentially linearly with the voltage between the gate and the source. The voltage between the drain and the source is here given the reference UDS while

IDS refers to the current through the transistor channel.

Since the channel's conductance is phase-rotated 900 with respect to the input signal IN, a current-voltage curve will be obtained which describes an "eight" in the resistive region of the field effect transistor.

Figure 4, in which t stands for time, shows the relationship between the input signal IN; the voltage u,, between the gate and the source; the channel conductance Q; the current iDS through the transistor channel, and the filtered output signal 0 for the same example of an embodiment. The current its shows a DC-component which is very close to zero.

According to an, in relation to the above described embodiment example, alternative embodiment of the invention, the transistor drain is also given a bias. In this way, the voltage over the transistor channel receives a DC-component.

With a suitable choice of the respective biases on the gate and the drain, if the transistor channel conductance is induced to vary sinusoidally in anti-phase with the voltage over the channel, a current through the transistor channel can be generated in which the fundamental frequency can be minimised even without filtering, at the same time as the power at higher order frequency components is held at an extremely low level.

Further, it is conceivable to use a bipolar transistor, such as an HBT (Heterojunction Bipolar Transistor) , instead of a field effect transistor as a switch in a similar way. In this case, a current which depends on the input signal is injected to the bipolar transistor base at the same time as a current which is preferably proportional to the input

signal is applied between the transistor's collector and its emitter. Advantageously, the transistor can in this connection be controlled so that it alternately is choked and saturated.

In this way, a current is obtained through the transistor between the collector and the emitter which is rich in harmonics and out of which the desired frequency component can be filtered. In a similar manner as for the field effect transistor, the relationship between the harmonics is influenced by varying the phase difference between the signal on the bipolar transistor's base and its collector, and by varying the direct current component on the current which is injected to the base.

In Figure 5 is shown a block diagram which illustrates a further alternative embodiment in relation to the embodiment described in connection to Figure 2. The power in an input signal IN is divided with the help of a power distributor 20 into a first part and a second part in such a way that the first part contains most of the power. This first part is delivered via a first filter 22 to the drain on a field effect transistor 25, which in the customary way also is equipped with a source and a gate. The voltage obtained during the frequency multiplication between the drain and the source has the reference UDS in the Figure. Between the drain and the source runs a channel the conductance of which depends on the voltage between the gate and the source. The source is connected to a second filter 26, on the output of which an output signal 0 is obtained.

The said second part of the power in the input signal IN is supplied to the gate on the transistor 25 via an adapter circuit 23, which in this example phase-rotates the signal 90 . With a suitable adaptation of the signal levels of the signals which are supplied to the drain resp. gate of the field effect transistor 25 and of a bias voltage VG, which is applied to the gate via an inductor 24, the transistor 25 is induced to work in its resistive region. Advantageously, the signal level of the signal which is supplied to the gate can be so adapted that the transistor channel conductance mainly only takes up two discrete values so that the transistor works as a switch which switches between high and low conductance levels. In this way, signal power at multiples of the input signal's frequency will be generated in the transistor 25. The filter 22 is adapted to transmit the fundamental frequency and to attenuate and reflect higher frequency components. The filter 26 is, however, adapted to attenuate and/or reflect the fundamental frequency and transmit desired higher frequency components to the output signal 0.

The described embodiment can advantageously be used as a frequency doubler in order to generate the second harmonic.

By varying the bias voltage VG, the relative strengths of the generated frequency components can be controlled. In this way, the third harmonic, for example, can be favoured.

The passive power distributor 20, which here is a Wilkinson- distributor with three ports, is shown in more detail in Figure 6. The Wilkinson-distributor 20 divides, according to a known technology per se, the input power from a first port P1 to two output ports P2 and P3 and hereby offers insulation

between the output ports. Generally, the Wilkinson- distributor 20 consists of three transition lines L1, L2 and L3, joined at one endpoint of the respective transmission lines. The transmission lines are in this example formed as stripline conductors but they can also be realised with other known methods. At a distance B/4, corresponding to one fourth of the wave length of the input signal, from this end point a resistor Rw is connected between the other end points of the transmission lines L2 and L3, where two conductors L4 and Ls are also connected.

If the characteristic impedances of the transmission conductors are matched to each other and to the resistor Rw according to known technology for a Wilkinson-distributor, and the output ports P2 and P3 are terminated free-of- reflection, no current flows in the resistor Rw and the Wilkinson-distributor thereby becomes virtually loss-free.

If the load impedance of one of the ports is not adequately matched, the reflected signal from that port is partially absorbed by the resistor. A part of the power in the reflected signal is also returned to the input but no power is transferred to the other output port as long as that port is adequately matched.

In order to obtain higher frequency components than the double frequency, a number of field effect transistors can advantageously be combined. A series connection of the two mainly identical field effect transistors is well suited for frequency trebling. If two series-coupled field effect transistors are so arranged that their respective channel conductances GFETl(t) and GFET2(t) in a first approximation can be assumed to be proportional to a sinusoidal input signal

and in anti-phase with respect to each other, in such a way that the following expression is valid: GFET1 (t) G3 [1 - cos(co0t+#)] GFET2 (t) G3 [1 + cos(#0t+#)] where G3 denotes the amplitude of the conductances, (P is the phase angle with respect to the input signal, t denotes time, and 0 denotes the angular frequency of the input signal, the following expression for the combined conductance GF( t) by the series-coupled field effect transistors is obtained: CF (t) = GFET1( t) . CFET2( t) G3 [1 - cos(2#t+2)i GFET1( t) + GFET2( t) 4 The combined conductance G,(t) is consequently approximately proportional to a sinusoidal signal, the frequency of which is twice as high as the frequency of the input signal.

If a voltage UIN (t), which is proportional to the input signal is applied to this combined conductance GF( t), then, if the voltage UIN (t) follows the following expression: UIN(t)= U3 cos#0t, a current i3(t) is obtained through the two field effect transistor channels, which can be described according to the function below: i3(t)=UIN(t) GF (t) t [2cosc3ot+cos(co0t+2(p)-cos(30)0t+ B 2(p)].

The current i3(t) will consequently mainly contain two frequency components: the fundamental angular frequency o, and the third harmonic. If the phase angle (p is a multiple of 1800, the amplitude of the fundamental frequency is minimised and the following expression for the current i3(t) is obtained: i3 (t) C3U3 (cosco0t - cos3co0t) 8 In Figure 7 is shown a simplified block diagram of a frequency trebler which works according to the above described principle. Two basically identical field effect transistors 36 and 37, each with a gate G6,G7, a drain D6, D7, <BR> <BR> <BR> <BR> a source S6,S7, S,, and a channel between the drain and the source, are connected in series by the drain D7 on the field effect transistor 37 being connected to the source S6 on the field effect transistor 36. The source S7 on the field effect transistor 37 is connected to earth. An input signal IN is fed to the drain D6 on the field effect transistor 36 via an amplifier circuit 31 and a bandpass filter 38. A bandpass filter 39 is also connected to the drain D6 on the field effect transistor 36. On the output of this bandpass filter a output signal 0 of the frequency trebler is obtained.

The input signal IN is -also coupled via two adapter circuits 32 and 33 to the gate G6 on the field effect transistor 36 resp. the gate G7 on the field effect transistor 37. The adapter circuit 32 has a phase shift of 1800 between input and output, whereas the adapter circuit 33 does not phase- rotate the signal. In all other respects, the signals on the

outputs of the adapter circuits 32, 33 are preferably identical. In this way, the gate G6 on the field effect transistor 36 is provided with a signal which lies in anti- phase with the input signal and the signal which is applied to the gate G7 on the field effect transistor 37. The gate G6 on the field effect transistor 36 is provided with a bias voltage VG2 through an inductor 35. In the same way, the gate G7 on the field effect transistor 37 is provided with a bias voltage VG1 through an inductor 34. In this embodiment, the bias voltage VG1 has the same value as the bias voltage VG2.

If the bias voltages VG1 and VG2, the amplitudes on the voltages which are applied to the gates of the field effect transistors and the connected-in-series field effect transistor channels are so adapted that the transistors are induced to essentially work within their resistive regions, the conductances of the field effect transistor channels will vary in anti-phase, with essentially the same amplitude. Since the input signal is applied to the field effect transistor channels connected-in-series, currents and voltages will be generated in which the third harmonic, which has a frequency three times as high as the input signal, will form an significant part.

In Figure 8 is shown an example of signals as function of the time t for this embodiment of the invention A sinusoidal input signal IN is applied to the frequency trebler. Hereby, a current i3(t) is generated through the field effect transistor channels. As the bandpass filter 39 is adapted for a frequency which is three times higher than the frequency of the input signal, the bandpass filter is

induced to filter out the desired frequency component from the current i3(t) In Figure 9 is shown a simplified block diagram of another embodiment of a frequency trebler according to the present invention. Two basically identical field effect transistors 46 and 47, each with a gate G6,G7, a drain D6, D7, a source S6,S7, and a channel between the drain and the source, are connected in parallel through a drain D7 on the field effect transistor 47 being connected to the drain D6 on the field effect transistor 46, and the two sources S6,S7 are connected to earth. An input signal IN is fed to the drains D6 , D7 on the two field effect transistors 46 and 47 via an amplifier circuit 41 and a bandpass filter 48. A bandpass filter 49, on the output of which the output signal 0 of the frequency trebler is obtained, is also connected to the drains.

The input signal IN is also coupled, via two adapter circuits 42 and 43, to the gate G6 on the field effect transistor 46 resp. the gate G7 on the field effect transistor 47. The adapter circuit 42 has a phase shift of 1800 between the input and the output, whereas the adapter circuit 43 does not phase-rotate the signal. In this way, the gate G6 on the field effect transistor 46 is applied a signal which is in anti-phase with the input signal and the signal which is applied to the gate G7 on the field effect transistor 47. 1800 and 00 are in this example the preferred phase rotations. Still, also other values can be chosen for these phase rotations.

The gate G6 on the field effect transistor 46 is further applied a bias voltage VG2 by an inductor 45. In the same

way, the gate G7 on the field effect transistor 47 is applied a bias voltage VG1 by an inductor 44. Preferably, the <BR> <BR> <BR> bias voltages Veg1, VG2 and the amplitudes of the voltages which are applied to the gates of the field effect transistors are adapted so that the transistors are induced to function as switches which alternate between high and low channel conductance. In this embodiment, the bias voltage VG2 has the same value as the bias voltage VG1. When the voltages on the transistor gates vary in anti-phase, the transistors will alternately have a high conductance. A conductance CD5p, which results out of the connection-in-parallel of the two channel conductances, will in this connection have a basically square wave shape, as illustrated in Figure 10 as a function of time t. In this Figure 10 is also shown a voltage UDS, which is the voltage across the conductance GDSP and essentially proportional to the input signal IN.

Furthermore is also shown a resulting current iDsp through the conductance CDsp, i.e., the current through the parallel- connected transistors 46 and 47.

The current through the parallel-connected field effect transistors 46, 47, generated by the voltage UDS, will comprise a number of harmonic frequency components, of which the third harmonic, which has a frequency three times as high as the input signal IN, forms an significant part. The relative strengths of- the frequency components can be controlled by adjusting the bias voltages VG1 and Veg2/ whereby the pulse quotient of the conductance GDSP as a function of time t can be set.

For further suppression of the fundamental frequency, the invention can advantageously be made in a balanced design.

An embodiment made according to this principle is illustrated in Figure 12.

The input signal here is applied to a power distributor 120, which has an input and two outputs 120a and 120b. The power distributor divides up the input effect equally to its two outputs 120a,120b in such a way that the signals on the outputs 120a,120b have the same signal level and lie 1800 out of phase with each other. The signal on the output 120a from the power distributor 120 is supplied to a first frequency multiplier module 80, wherein it is led via a first buffer 81 and a first bandpass filter 82 to a drain on a first field effect transistor 85. The field effect transistor 85 is further in the customary manner provided with a gate, a source and a channel between the drain and the source. The conductance of the channel depends on the voltage between the gate and the source. The source is connected to earth.

The signal on the output 120a is also applied to an adapter circuit 83, which contains a certain amplification and phase-shifts the input signal by a phase angle p. This phase angle p is in this example equal to 900. The output on the adapter circuit 83 is connected to the gate of the field effect transistor 85. Further, the gate is applied a bias voltage V0 via a first inductor 84.

Through the signal on the output 120a from the power distributor 120, super-imposed on a suitable bias voltage VG, being applied to the gate of the field effect transistors 85, the conductance between this field effect transistor's drain and source is induced to vary with the

same frequency f0 as the signal on the output 120a, and thereby also the input signal IN. The output signal from the frequency multiplier module 80 is extracted from the drain on the transistor 85 and applied to a first input to the power combiner 121.

The output 120b from the power distributor 120 is connected to a second frequency multiplier module 90, comprising a second buffer 91, a second bandpass filter 92, a second adapter circuit 93, a second inductor 94 and a second field effect transistor 95, where these components are completely analogously arranged with the earlier mentioned first buffer 81, first bandpass filter 82, first adapter circuit 83, first inductor 84 and first field effect transistor 85.

Thus, the two frequency multiplier modules 80,90 have essentially a completely identical functionality. The output signal from the frequency multiplier module 90 is extracted from the drain on the transistor 92 and supplied to a second input of the power combiner 121. This power combiner 121 adds the signals on its two inputs in phase. Since the two frequency multiplier modules fundamentally are identical, the output signals from the two frequency multiplier modules will have basically identical amplitude spectrum, but will because of the power distributor 120 have different phase spectrums. The fundamental frequency will be added with a phase difference of- 1800, i.e., with destructive interference. The second harmonic, which has a frequency twice as high as the fundamental frequency, will be added with a phase difference of 3600, i.e., in phase. In the same way, the Nth harmonic, where N is a positive integer, will be added with a phase difference of N 1800. This means that

all odd harmonics will tend to be extinguished whereas all even harmonics will be amplified. Thus, with such a balanced embodiment of the invention, a frequency multiplier is obtained with very good suppression of the fundamental frequency, the third harmonic and even higher order odd harmonics, which gives an ideal relationship for a frequency doubler.

For the sake of clarity, the frequency multiplier in this embodiment is shown as two identical frequency multiplier modules 80,90, which both have the same way of working as the frequency multiplier presented in connection to Figure 2. A person skilled in the art will, however, realise that many variations of this balanced embodiment are possible.

The embodiment can be simplified by, for example, combining the buffers 81 and 91 by using an amplifier with an inverting and a non-inverting output. In the same way, the adapter circuits 83 and 93 can be combined, which makes the passive power distributor 120 completely superfluous. That many further variations of this balanced embodiment exist is easy to see as fundamentally all earlier disclosed ways of working for a frequency doubler according to the present invention can be used for the two frequency multiplier modules 80 and 90.

In the radio technology, there is often a requirement for generating high-frequency periodic signals in a receiver, where a so-called local oscillator is used in order to convert an incoming signal from an antenna to an intermediate frequency through so-called mixing. In order to provide good separation of the different frequency bands is normally a local oscillator frequency in the same order of

size as the frequency of the incoming signal chosen. For extremely high frequencies, e.g., over 30 gigahertz, it is, however, expensive to construct a local oscillator with low phase noise which oscillates at the desired frequency. In many cases, therefore, there is a requirement for being able to multiply the frequency of the local oscillator before the frequency converting.

In Figure 11 is shown a simplified block diagram of a superheterodyne receiver 70 according to an embodiment of the present invention. Here, a local oscillator generates a frequency which is low in relation to the frequency of an incoming radio frequency signal RF. The so generated frequency is then multiplied before in the customary way being mixed with the radio frequency signal RF, which constitutes an input signal to the superheterodyne receiver 70. In this embodiment of the invention, the superheterodyne receiver 70 is intended for receiving microwave signals.

The incoming radio frequency signal RF is supplied to a first input on a mixer 73. A local oscillator 74 generates a sinusoidal signal Smo with a local oscillator frequency fLO.

This signal is supplied to a frequency multiplier device 75 comprising a chain of four frequency doublers 74a, .., 74d, each designed according to the embodiment described in connection to Figure 2. Each frequency doubler 74a, .., 74d generates a signal of which the dominant frequency component is twice as high as the dominant frequency component in the input signal to the respective frequency doubler. The frequency doubler 74d, which lies last in the multiplier chain, generates a mixer signal B which consequently is dominated by a frequency which is 16 times higher than the

local oscillator frequency fLO and somewhat higher than that of the radio frequency signal RF. This mixer signal B is supplied to a second input on the mixer 73.

The number of frequency multipliers in the chain are in this example equal to four, which, however, only is a randomly chosen number. Further, each the frequency multiplier, or alternatively some of the frequency multipliers, can be induced to produce a higher harmonic than the second.

Therefore, for the desired relationship between the local oscillator frequency and the frequency band of the radio frequency signal, a mixer signal B can be obtained wherein the frequency is equal to the local oscillator frequency fLO multiplied with an arbitrary integer.

The mixer 73, which generates a signal S7, performs essentially a function which corresponds to a multiplication of the signals RF and B which are applied to its two inputs.

This results in generation of sum- and difference frequencies between the frequencies in the mixer signal B and the radio frequency signal RF. The so obtained signal S7 is applied to a bandpass filter 76 which filters out the desired mixed frequencies, which in this example are the difference frequencies. In this way, a signal IF is obtained, which is amplified by an intermediate frequency amplifier 77. Through this method, the received radio frequency signal's frequency band is shifted from the microwave region down to a lower frequency region.

The signal on the output from the intermediate frequency amplifier 77 is applied to a detector in the form of a frequency demodulator, which is constructed according to the

prior art for demodulation of a frequency-modulated signal (FM). In this way, a computer signal LF is obtained. The superheterodyne reception is also used for other types of signal modulations. By selecting a suitable type of detector, the superheterodyne receiver 70 can also be used for, e.g., amplitude-modulated (AM) or phase-modulated (PM) signals.

The use of a radio link for transmitting telephony and data information is today a normally occurring event. The radio links are often joined together so that complete transmission nets are built with a plurality of radio links.

The traffic emanates, for example, from a telephone exchange and the radio link net then distributes the telephone traffic out to the subscribers in a successively fine-meshed net of links. Another common field of application is mobile telephony, wherein the radio link is used for the distribution to distance or inaccessibly situated base stations. Examples of this are high points in terrain or big city environments where it is difficult and expensive to use existing ground-based communication.

A radio link according to the present invention consists, as illustrated in Figure 13 wherein the radio link has the reference 150, of two radio link transceivers 130,140, which communicate with each other over a radio connection, normally in the microwave region. In this embodiment of the invention, the radio link transceivers 130,140 each comprise three main modules; an access module 131,141, a radio module 132,142, and an antenna module 133,143.

The access modules 131,141 constitute the radio link's interface with the surroundings and communicate depending on the application with base stations in a mobile telephony system or with exchanges in a fixed telephone network, for example.

The main task for the radio modules 132,142 consists somewhat simplified of transferring speech and/or data to and from the frequency band, or bands, on which the radio connection between the radio link transceivers 130,140 takes place. In this example, these frequency bands lie around 38 GHz. As mentioned above, it is, however, extremely expensive to construct a well-functioning local oscillator with low phase noise, which oscillates at these high frequencies. The radio modules 132,142 comprise therefore superheterodyne receivers as described above in connection with Figure 11, comprising frequency multiplier chains. Hereby, lower local oscillator frequencies are made possible. Further, frequency multiplier chains are also used in a corresponding way on the transmitter side for generating a carrier wave with the intended wave length.

The main component of the antenna modules 133,143 is a parabolic antenna, which is directed towards the corresponding antenna module 143,133 in the other radio link transceiver 140,130 in the radio link 150.

In Figure 14, a further embodiment of the invention is shown. This offers a frequency multiplier with an extremely uncomplicated design. An input signal IN is via a first bandpass filter 52 coupled to a source S on a field effect transistor 55. This first bandpass filter 52 is adapted to

transmit the fundamental frequency of the input signal and to act as a block for signal components with twice as high frequency as this fundamental frequency. The field effect transistor 55 is further provided with a drain D and a gate G. Between the source S and the drain D, there is a channel.

When the field effect transistor is in its resistive region, the conductance of this channel is dependent on the voltage between the gate G and the source S.

A bias voltage V0 is connected to the gate G via an inductor 54. Furthermore, the gate is also connected to earth by a capacitance 53. The impedance of the gate G to earth is by this capacitance 53 negligible at signal frequencies. In this way, the gate obtains a constant potential which is equal to V whereas the gate from a signal point of view is earthed.

The drain D is connected to the input of a second bandpass filter 56. On the output from this second bandpass filter 56, which is dimensioned to let through signal components with a frequency double as high as the fundamental frequency of the input signal IN and at the same act as a block for this fundamental frequency, an output signal 0 is obtained.

The function of this frequency multiplier is illustrated in Figure 15, wherein t denotes the time axis. If the input signal IN is a sinusoidal signal, the voltage U06 between the gate G and the source S will be sinusoidal, as the gate G from a signal point of view is earthed, and will lie phase- shifted on 1800 in relation to the input signal IN. During the time intervals when the potential on the source S is higher than the potential on the gate G, the channel

conductance will be extremely close to zero. However, during the time intervals when the potential on the source S greatly exceeds the potential of the gate, the channel conductance will take up its maximum value. By a suitable choice of signal amplitudes on the input signal IN and of the bias voltage V an approximately square-shaped appearance of the time function Ccs of the channel conductance is obtained, as illustrated in Figure 15.

Greatly simplified, the transistor can be considered to be conducting during a part of the input signal time period and for the rest of the time be insulating. In this way, the voltage UD between the drain D and earth will obtain an appearance according to the Figure. Because the voltage UD is a repetitive signal with the same fundamental frequency as the input signal IN, the voltage UD will contain a number of frequency components which are multiples of the fundamental frequency of the input signal. By varying the bias voltage V,, the time relationship between conducting and insulating, i.e., the pulse quotient for the time function GDS of the channel conductance, can be set so that the desired frequency component is favoured. This desired frequency component, in this case equal to the double frequency, is then filtered out with the filter 56.

In this example the filters 52 and 56 are realised with the help of two short transmission-conducting elements, so- called stubs. The transmission-conducting elements in the filters 52 and 56 have each a length which corresponds to a quarter wave length for the fundamental frequency and consequently a half wave length for the second harmonic. The transmission-conducting element in the filter 52 is at a

first end both connected to the input and the output of the filter 52 and is at a second end short-circuited.

In the first end of the transmission-conducting element in the filter 52, the short-circuiting of the corresponding second end of the element has the effect that the input impedance to this transmission-conducting element almost becomes zero for the second harmonic, which is thereby short-circuited. For the fundamental frequency, the input impedance on the other hand becomes extremely high so that the fundamental frequency can be transmitted through the filter 52 without being influenced by the transmission- conducting element.

The transmission-conducting element in the filter 56 is connected at a first end both to the input and the output of the filter 56 and has at a second end a very high impedance.

In the first end of the transmission conducting element, the high impedance on the corresponding second end of the element has the effect that the input impedance to this transmission-conducting element becomes very high for the second harmonic. The second harmonic is consequently hardly influenced by the transmission-conducting element but can almost completely be transmitted from the input of the filter 56 to its output.

For the fundamental frequency, the input impedance for the transmission-conducting element of this filter 56 on the other hand becomes almost zero so that the fundamental frequency is short-circuited. The incoming signal power at this fundamental frequency therefore will in the main be

reflected in the filter 56 back to the field effect transistor 55.

In the same way as with the fundamental frequency, every odd harmonic will be short-circuited in the filter 56 and reflected back to the field effect transistor. In this way, an extremely small part of a possibly generated signal power at for example the third harmonic will be found in the output signal 0.

The above described filter construction offers an extremely simple realization of the filters. It is especially suitable for MMIC, where these stubs can be produced without difficulty. However, this filter realization is naturally only an example; many other filter constructions are conceivable in this connection.

In all of the above described embodiments of the invention, the input signal to the frequency multiplier is periodic.

The invention is, however, not limited only to frequency multiplying of harmonic frequency components; the input signal can also be a signal which contains a frequency band, such as for example a frequency-modulated (FM) or a phase- modulated (PM) signal. Frequency multipliers are in this connection used for increasing the modulation index of FM and PM signals through broadening of the frequency bands.