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Title:
DEVICE-MOUNTING STRUCTURE IN SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2013/157300
Kind Code:
A1
Abstract:
This invention realizes a device-mounting structure capable of exploiting the advantages of low power consumption and fast response characteristics of a semiconductor device in which GaN is used. A surface-mounting type device-mounting structure is employed, the reverse surface of a GaN chip (30) is electrically connected to the obverse surface of a die pad (14), and the connection between the die pad (14) and the source terminal (11) of the chip (30) is established by wire bonding. The die pad (14) has the reverse surface exposed and configured so as to be capable of electrically connecting to the electrode pad (source pad) on the printed substrate. Consequently, leak current from the chip reverse surface is reduced, on-resistance is decreased, loop current between the gate and the source is reduced, and parasitic inductance on the source wiring side is decreased, thereby suppressing gate voltage oscillation via a parasitic capacitance between the gate and the source.

Inventors:
INOSHIRI RYOH
Application Number:
PCT/JP2013/054757
Publication Date:
October 24, 2013
Filing Date:
February 25, 2013
Export Citation:
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Assignee:
SHARP KK (JP)
International Classes:
H01L23/48; H01L21/338; H01L29/778; H01L29/812
Foreign References:
JP2003347491A2003-12-05
JP2010238892A2010-10-21
JP2008166621A2008-07-17
JPH10261756A1998-09-29
JP2000341001A2000-12-08
Attorney, Agent or Firm:
MASAKI, YOSHIFUMI (JP)
Yoshifumi Masaki (JP)
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