Title:
DIFFERENTIAL SR FLIP-FLOP AND TESTER USING SAME
Document Type and Number:
WIPO Patent Application WO/2011/018818
Kind Code:
A1
Abstract:
A differential SR flip-flop (100) generates a differential output pair (Q, #Q) upon receiving a set signal (S) and a reset signal (R). A first flip-flop (FF1) generates a noninverted output (Q1) and an inverted output (#Q1). A second flip-flop (FF2) generates a noninverted output (Q2) and an inverted output (#Q2). An averaging circuit (10) averages one output (Q1) of the first flip-flop (FF1) and one output (Q2) of the second flip-flop (FF2) to generate a first output signal (Q3) and averages the other output (#Q1) of the first flip-flop (FF1) and the other output (#Q2) of the second flip-flop (FF2) to generate a second output signal (#Q3). The differential SR flip-flop (100) outputs a signal corresponding to the first output signal (Q3) and a signal corresponding to the second output signal (#Q3) as the differential output pair.
Inventors:
KOJIMA SHOJI (JP)
Application Number:
PCT/JP2009/003844
Publication Date:
February 17, 2011
Filing Date:
August 10, 2009
Export Citation:
Assignee:
ADVANTEST CORP (JP)
KOJIMA SHOJI (JP)
KOJIMA SHOJI (JP)
International Classes:
H03K3/02
Foreign References:
| JP2006333206A | 2006-12-07 | |||
| JPS63269615A | 1988-11-07 |
Attorney, Agent or Firm:
MORISHITA, SAKAKI (JP)
Sakaki Morishita (JP)
Sakaki Morishita (JP)
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