TRANSFER TORQUE MEMORY DEVICES

BACKGROUND OF THE INVENTION

Embodiments of the present description generally relate to the field of integrated circuit (IC) devices, and, more particularly, to spin transfer torque memory devices.

BACKGROUND

Higher performance, lower cost, increased miniaturization of integrated circuit components, and greater packaging density of integrated circuits are ongoing goals of the integrated circuit industry for the fabrication of logic and memory devices. Spin devices, such as spin logic and spin memory, can enable a new class of logic and architectures for integrated circuit components. Thus, there is an ongoing drive to improve the design and efficiency of these spin devices.

BRIEF DESCRIPTION OF THE DRAWINGS

The subject matter of the present disclosure is particularly pointed out and distinctly claimed in the concluding portion of the specification. The foregoing and other features of the present disclosure will become more fully apparent from the following description and appended claims, taken in conjunction with the accompanying drawings. It is understood that the accompanying drawings depict only several embodiments in accordance with the present disclosure and are, therefore, not to be considered limiting of its scope. The disclosure will be described with additional specificity and detail through use of the accompanying drawings, such that the advantages of the present disclosure can be more readily ascertained, in which:

FIG. la is a schematic diagram illustrating a spin transfer torque memory device in accordance with an embodiment of the present description.

FIG. lb is a schematic diagram illustrating a spin transfer torque memory device in accordance with another embodiment of the present description. FIG. 2a is a side view schematic illustrating a magnetic tunnel junction with a free magnetic layer having a magnetic orientation anti-parallel to a fixed magnetic layer in accordance with an embodiment of the present description.

FIG. 2b is a side view schematic illustrating a magnetic tunnel junction with a free magnetic layer having a magnetic orientation parallel to a fixed magnetic layer in accordance with an embodiment of the present description.

FIG. 3 is a side view schematic of a magnetic tunnel junction having free and fixed manganese-based Heusler magnetic layers with a manganese-tolerant Heusler

semiconducting tunnel barrier in accordance with an embodiment of the present description.

FIG. 4 is a flow diagram of a process of fabricating a magnetic tunnel junction in accordance with an embodiment of the present description.

FIG. 5 illustrates a computing device in accordance with one implementation of the present description.

DETAILED DESCRIPTION

In the following detailed description, reference is made to the accompanying drawings that show, by way of illustration, specific embodiments in which the claimed subject matter may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the subject matter. It is to be understood that the various embodiments, although different, are not necessarily mutually exclusive. For example, a particular feature, structure, or characteristic described herein, in connection with one embodiment, may be implemented within other embodiments without departing from the spirit and scope of the claimed subject matter. References within this specification to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one implementation encompassed within the present description. Therefore, the use of the phrase "one embodiment" or "in an embodiment" does not necessarily refer to the same embodiment. In addition, it is to be understood that the location or arrangement of individual elements within each disclosed embodiment may be modified without departing from the spirit and scope of the claimed subject matter. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the subject matter is defined only by the appended claims, appropriately interpreted, along with the full range of equivalents to which the appended claims are entitled. In the drawings, like numerals refer to the same or similar elements or functionality throughout the several views, and that elements depicted therein are not necessarily to scale with one another, rather individual elements may be enlarged or reduced in order to more easily comprehend the elements in the context of the present description.

The terms "over", "to", "between" and "on" as used herein may refer to a relative position of one layer with respect to other layers. One layer "over" or "on" another layer or bonded "to" another layer may be directly in contact with the other layer or may have one or more intervening layers. One layer "between" layers may be directly in contact with the layers or may have one or more intervening layers.

Embodiments of the present description relate to the fabrication of spin transfer torque memory devices having a magnetic tunnel junction with manganese-based Heusler alloys as a fixed magnetic layer and a free magnetic layer, and with a tunnel barrier layer between the fixed magnetic layer and the free magnetic layer, wherein the tunnel barrier layer is insensitive to the diffusion of manganese. In one embodiment, the tunnel barrier layer may be a semiconducting Heusler alloy.

FIG. la shows a schematic of an integrated circuit device, illustrated as a spin transfer torque memory cell 100 which includes a spin transfer torque element 110. The spin transfer torque element 110 may comprise a top cap/contact or free magnetic layer electrode 120 with a free magnetic layer 130 adjacent the free magnetic layer electrode 120, a bottom cap or fixed magnetic layer electrode 160 adjacent a pinned or fixed magnetic layer 150, and a tunnel barrier layer 140 between the free magnetic layer 130 and the fixed magnetic layer 150. A dielectric material 145 may be formed adjacent the fixed magnetic layer electrode 160, the fixed magnetic layer 150, and the tunnel barrier layer 140. The free magnetic layer electrode 120 may be electrically connected to a bit line 182. The fixed magnetic layer electrode 160 may be connected to a transistor 180. The transistor 180 may be connected to a word line 184 and a signal line 186 in a manner that will be understood to those skilled in the art. The spin transfer torque memory cell 100 may further include additional read and write circuitry (not shown), a sense amplifier (not shown), a bit line reference (not shown), and the like, as will be understood by those skilled in the art, for the operation of the spin transfer torque memory cell 100. It is understood that a plurality of the spin transfer torque memory cells 100 may be operably connected to one another to form a memory array (not shown), wherein the memory array can be incorporated into a non-volatile memory device.

The portion of the spin transfer torque element 110 comprising the free magnetic layer 130, the tunnel barrier layer 140, and the fixed magnetic layer 150 is known as a magnetic tunnel junction 170.

As shown in FIG. lb, the spin transfer torque memory cell 100 may have a reverse orientation, wherein the free magnetic layer electrode 120 may be electrically connected to the transistor 180 and the fixed magnetic layer electrode 160 may be connected to the bit line 182.

Referring to FIGs. 2a and 2b, the magnetic tunnel junction 170 functions essentially as a resistor, where the resistance of an electrical path through the magnetic tunnel junction 170 may exist in two resistive states, either "high" or "low", depending on the direction or orientation of magnetization in the free magnetic layer 130 and in the fixed magnetic layer 150. FIG. 2a illustrates a high resistive state, wherein direction of magnetization in the free magnetic layer 130 and the fixed magnetic layer 150 are substantially opposed or anti -parallel with one another. This is illustrated with arrows 172 in the free magnetic layer 130 pointing downward and with arrows 174 in the fixed magnetic layer 150 aligned in opposition pointing upward. FIG. 2b illustrates a low resistive state, wherein direction of magnetization in the free magnetic layer 130 and the fixed magnetic layer 150 are substantially aligned or parallel with one another. This is illustrated with arrows 172 in the free magnetic layer 130 and with arrows 174 in the fixed magnetic layer 150 aligned the same direction pointing from upward.

It is understood that the terms "low" and "high" with regard to the resistive state of the magnetic tunnel junction 170 are relative to one another. In other words, the high resistive state is merely a detectibly higher resistance than the low resistive state, and vice versa. Thus, with a detectible difference in resistance, the low and high resistive states can represent different bits of information (i.e. a "0" or a "1").

The direction of magnetization in the free magnetic layer 130 may be switched by the transistor 180 through a process call spin transfer torque ("STT") using a spin-polarized current. An electrical current is generally unpolarized (e.g. consisting of about 50% spin-up and about 50% spin-down electrons). A spin polarized current is one with a great number of electrons of either spin-up or spin-down, which may be generated by passing a current through the fixed magnetic layer 150. The electrons of the spin polarized current from the fixed magnetic layer 150 tunnel through the tunnel barrier layer 140 and transfers its spin angular momentum to the free magnetic layer 130, wherein to free magnetic layer 130 will orient its magnetic direction from anti-parallel, as shown in FIG. 2a, to that of the fixed magnetic layer 150 or parallel, as shown in FIG. 2b. The free magnetic layer 130 may be returned to its origin orientation, shown in FIG. 2a, by reversing the current.

Thus, the magnetic tunnel junction 170 may store a single bit of information ("0" or "1") by its state of magnetization. The information stored in the magnetic tunnel

junction 170 is sensed by driving a current through the magnetic tunnel junction 170. The free magnetic layer 130 does not require power to retain its magnetic orientations; thus, the state of the magnetic tunnel junction 170 is preserved when power to the device is removed. Therefore, the spin transfer torque memory device 100 of FIG. la and lb is non-volatile.

In order to improve the performance of the magnetic tunnel junction 170, the free magnetic layer and the fixed magnetic layer may formed from manganese-based Heusler alloys (also called "Heusler half-metals"), which are labeled as free Heusler magnetic layer and fixed Heusler magnetic layer. Heusler alloys are ferromagnetic metal alloys based on a Heusler phase, which are intermetallics having a specific composition and face-centered cubic crystal structure. Heusler alloys possess ferromagnetic properties dues to a double- exchange mechanism between neighboring magnetic ions. Such Heusler alloys may include, but are not limited to type XYZ alloys, where X may be cobalt, manganese, iron, and the like, where Y may be vanadium, chromium, titanium, iron, and the like, and wherein Z may be aluminum, gallium, indium, silicon, germanium, tin, phosphorous, antimony, and the like. These may include common Heusler alloys such as Co ₂ FeAl, Co ₂ FeGe, Co ₂ FeSi, Co ₂ MnAl, Co ₂ MnGa, Co ₂ MnGe, Co ₂ MnSi, Co ₂ NiGa, Cu ₂ MnAl, Cu ₂ MnIn, Cu ₂ MnSn, Ni ₂ MnAl, Ni ₂ MnIn, Ni ₂ MnSb, Ni ₂ MnGa, Ni ₂ MnSn, Pd ₂ MnAl, Pd ₂ MnIn, Pd ₂ MnSb, and Pd ₂ MnSn (wherein Al is aluminum, Co is cobalt, Cu is copper, Fe is iron, Ga is gallium, Ge is germanium, In is indium, Mn is manganese, Ni is nickel, Pd is palladium, Sb is antimony , Si is silicon, and Sn is tin. As will be understood to those skilled in the art, such Heusler alloys act as their own filter, because, depending on their spin state, they can be highly metallic or much less metallic (assuming "spin-up" to be the conducting state and "spin-down" to be the insulating state). As the Heusler alloy acts as its own spin filter, the tunnel barrier layer 140 of FIGs. la and lb can be a conductive spacer, such as a metal layer.

FIG. 3 illustrates the magnetic tunnel junction 170 according to one embodiment of the present description, wherein the magnetic tunnel junction 170 may have the free magnetic layer (labeled as element 130 _H ) and the fixed magnetic layer (labeled as element 15 O _H ) formed from manganese-based Heusler alloys, as it has been found that using manganese- based Heusler alloys improve the performance of the magnetic tunnel junction 170. These manganese-based Heusler alloys may be MnXGa, MnXSn, MnXSb, MnXGa, MnXAl, MnXSi, where Mn is manganese, Ga is gallium, Sn is tin, Sb is antimony, Co is cobalt, Al is aluminum, Si is silicon, and where X may be manganese, vanadium, chromium, titanium, and iron. In one embodiment, the manganese-based Heusler alloy free magnetic layer 130 _H and the manganese-based Heusler alloy fixed magnetic layer 150 _H may be a

manganese/iron/gallium alloy.

Although manganese-based Heusler alloy free magnetic layers 130 _H and manganese- based Heusler alloy fixed magnetic layers 150 _H result in the magnetic tunnel junction 170 having improved performance, diffusion of manganese from one layer to another at typical back-end processing temperatures can cause the magnetic tunnel junction 170 to perform poorly, as the diffused manganese poisons the tunnel barrier layer. Thus, in one embodiment of the present description, the tunnel barrier layer (labeled as element 140 _H ) may be formed from a material that is insensitive to the diffusion of manganese. The term "insensitive" in this context is defined to mean that the electrical and magnetic properties of the material are not substantially changed if manganese diffuses into the material. In an embodiment, the tunnel barrier 140 _H may be formed from a material which absorbs less than about 5% by weight manganese. In one embodiment of the present description, the tunnel barrier layer 140 _H may comprise a Heusler alloy that is insensitive to the diffusion of manganese. As the tunnel barrier layer 140 _H should be sufficiently semiconducting to allow for the operation of the magnetic tunnel junction 170 with sufficient resistance to approximately match the access transistor resistance (e.g. the resistance should be in the range of between

about Ο.ΟΙΩ.μπι ² to ΙΟΩ.μπι ² ), in another embodiment, the tunnel barrier layer 140 _H may be a semiconducting Heusler alloy that is insensitive to the diffusion of manganese. In a specific embodiment of the present description, the semiconducting Heusler alloy may be a cobalt/titanium/antimony Heusler alloy. In a further specific embodiment of the present description, the semiconducting Heusler alloy may be a nickel/titanium/tin alloy.

Although the precise methods of fabricating the magnetic tunnel junction 170 of FIG. 3 has not been described herein, it is understood that the steps for fabrication may include standard integrated circuit fabrication processes such as lithography, etch, thin films deposition, planarization (such as chemical mechanical polishing (CMP)), diffusion, metrology, the use of sacrificial layers, the use of etch stop layers, the use of planarization stop layers, and/or any other associated action with integrated circuit fabrication.

FIG. 4 is a flow chart of a process 200 of fabricating a magnetic tunnel junction according to an embodiment of the present description. As set forth in block 202, a fixed magnetic layer comprising a manganese-based Heusler alloy may be formed. A fixed magnetic layer comprising a manganese-based Heusler alloy may be formed, as set forth in block 204. As set forth in block 206, a tunnel barrier layer may be formed between the fixed magnetic layer and the free magnetic layer, wherein the tunnel barrier layer whose electrical and magnetic properties are insensitive to the diffusion of manganese.

FIG. 5 illustrates a computing device 300 in accordance with one implementation of the present description. The computing device 300 houses a board 302. The board 302 may include a number of components, including but not limited to a processor 304, at least one communication chip 306A, 306B, volatile memory 308, (e.g., DRAM), non-volatile memory 310 (e.g., ROM), flash memory 312, a graphics processor or CPU 314, a digital signal processor (not shown), a crypto processor (not shown), a chipset 316, an antenna, a display (touchscreen display), a touchscreen controller, a battery, an audio codec (not shown), a video codec (not shown), a power amplifier (AMP), a global positioning system (GPS) device, a compass, an accelerometer (not shown), a gyroscope (not shown), a speaker (not shown), a camera, and a mass storage device (not shown) (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth). Any of the integrated circuit components may be physically and electrically coupled to the board 302. In some

implementations, at least one of the integrated circuit components may be a part of the processor 304.

The communication chip(s) 306 A, 306B enable wireless communications for the transfer of data to and from the computing device 300. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. The communication chip(s) 306 A, 306B may implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The computing device 300 may include a plurality of communication chips 306 A, 306B. For instance, a first communication chip 306 A may be dedicated to shorter range wireless communications such as Wi-Fi and Bluetooth and a second communication chip 306B may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.

The term "processor" may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory. Any of the integrated circuit components within the computing device 300 may include a spin transfer torque memory having a magnetic tunnel junction, including a fixed magnetic layer comprising a manganese- based Heusler alloy, a free magnetic layer comprising a manganese-based Heusler alloy, and a tunnel barrier layer between the fixed magnetic layer and the free magnetic layer, wherein the tunnel barrier layer is insensitive to the diffusion of manganese, as described within this detailed description.

In various implementations, the computing device 300 may be a laptop, a netbook, a notebook, an ultrabook, a smartphone, a tablet, a personal digital assistant (PDA), an ultra mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a digital camera, a portable music player, or a digital video recorder. In further implementations, the computing device 300 may be any other electronic device that processes data.

It is understood that the subject matter of the present description is not necessarily limited to specific applications illustrated in the figures. The subject matter may be applied to other integrated circuit device and assembly applications, as well as any appropriate transistor application, as will be understood to those skilled in the art.

The following examples pertain to further embodiments, wherein Example 1 is a integrated circuit device, comprising a magnetic tunnel junction, including a fixed magnetic layer comprising a manganese-based Heusler alloy, a free magnetic layer comprising a manganese-based Heusler alloy, and a tunnel barrier layer between the fixed magnetic layer and the free magnetic layer, wherein the tunnel barrier layer is insensitive to the diffusion of manganese.

In Example 2, the subject matter of Example 1 can optionally include the tunnel barrier layer absorbing less than about 5% by weight manganese.

In Example 3, the subject matter of Example 1 can optionally include the tunnel barrier layer comprising a semiconducting Heusler alloy.

In Example 4, the subject matter of Example 3 can optionally include the tunnel barrier layer comprising a cobalt/titanium/antimony Heusler alloy.

In Example 5, the subject matter of Example 3 can optionally include the tunnel barrier layer comprising a nickel/titanium/tin Heusler alloy.

In Example 6, the subject matter of any of Examples 1 to 5 can optionally include the fixed magnetic layer comprising a Heusler alloy selected from the group consisting of MnXGa, MnXSn, MnXSb, MnXGa, MnXAl, MnXSi, wherein X comprises one of manganese, vanadium, chromium, titanium, and iron.

In Example 7, the subject matter of any of Examples 1 to 5 can optionally include the free magnetic layer comprising a Heusler alloy selected from the group consisting of MnXGa, MnXSn, MnXSb, MnXGa, MnXAl, MnXSi, wherein X comprises one of manganese, vanadium, chromium, titanium, and iron.

In Example 8, the subject matter of Example 1 can optionally include a free magnetic layer electrode abutting the free Heusler magnetic layer and a fixed magnetic layer electrode abutting the fixed Heusler magnetic layer.

In Example 9, the subject matter of Example 8 can optionally include the fixed magnetic layer electrode electrically connected to a bit line, and a transistor electrically connected to the free magnetic layer electrode, a source line, and a word line. In Example 10, the subject matter of Example 8 can optionally include the free magnetic layer electrode electrically connected to a bit line, and a transistor electrically connected to the fixed magnetic layer electrode, a source line, and a word line.

The following examples pertain to further embodiments, wherein Example 11 is a method of forming a integrated circuit device, comprising forming a magnetic tunnel junction, including: forming a fixed magnetic layer comprising a manganese-based Heusler alloy, forming a free magnetic layer comprising a manganese-based Heusler alloy, and forming a tunnel barrier layer between the fixed magnetic layer and the free magnetic layer, wherein the tunnel barrier layer is insensitive to the diffusion of manganese.

In Example 12, the subject matter of Example 11 can optionally include forming the tunnel barrier layer forming the tunnel barrier layer from a material which absorbs less than about 5% by weight manganese.

In Example 13, the subject matter of Example 11 can optionally include forming the tunnel barrier layer comprising forming a semiconducting Heusler alloy layer.

In Example 14, the subject matter of Example 13 can optionally include forming the tunnel barrier layer comprising forming a cobalt/titanium/antimony Heusler alloy layer.

In Example 15, the subject matter of Example 13 can optionally include forming the tunnel barrier layer comprising forming a nickel/titanium/tin Heusler alloy layer.

In Example 16, the subject matter of any of Examples 11 to 15 can optionally include forming the fixed magnetic layer comprising forming a Heusler alloy layer selected from the group consisting of MnXGa, MnXSn, MnXSb, MnXGa, MnXAl, MnXSi, wherein X comprises one of manganese, vanadium, chromium, titanium, and iron.

In Example 17, the subject matter of any of Examples 11 to 15 can optionally include forming the free magnetic layer comprising forming a Heusler alloy layer selected from the group consisting of MnXGa, MnXSn, MnXSb, MnXGa, MnXAl, MnXSi, wherein X comprises one of manganese, vanadium, chromium, titanium, and iron.

In Example 18, the subject matter of Example 11 can optionally include forming a free magnetic layer electrode abutting the free magnetic layer and forming and forming a fixed magnetic layer electrode abutting the fixed magnetic layer. In Example 19, the subject matter of Example 18 can optionally include electrically connecting the fixed magnetic layer electrode to a bit line, and forming a transistor electrically connected to the free magnetic layer electrode, a source line, and a word line.

In Example 20, the subject matter of Example 18 can optionally include electrically connecting the free magnetic layer electrode to a bit line, and forming a transistor electrically connected to the fixed magnetic layer electrode, a source line, and a word line.

The following examples pertain to further embodiments, wherein Example 21 is an electronic system, comprising a board; and a integrated circuit device attached to the board, wherein the integrated circuit device includes a spin transfer torque memory device having a magnetic tunnel junction, including a fixed magnetic layer comprising a manganese-based Heusler alloy, a free magnetic layer comprising a manganese-based Heusler alloy, and a tunnel barrier layer between the fixed magnetic layer and the free magnetic layer, wherein the tunnel barrier layer is insensitive to the diffusion of manganese.

In Example 22, the subject matter of Example 21 can optionally include the tunnel barrier layer absorbing less than about 5% by weight manganese.

In Example 23, the subject matter of Example 21 can optionally include the tunnel barrier layer comprising a semiconducting Heusler alloy.

In Example 24, the subject matter of Example 23 can optionally include the tunnel barrier layer comprising a cobalt/titanium/antimony Heusler alloy.

In Example 25, the subject matter of Example 23 can optionally include the tunnel barrier layer comprising a nickel/titanium/tin Heusler alloy.

In Example 26, the subject matter of any of Examples 21 to 25 can optionally include the fixed magnetic layer comprising a Heusler alloy selected from the group consisting of MnXGa, MnXSn, MnXSb, MnXGa, MnXAl, MnXSi, wherein X comprises one of manganese, vanadium, chromium, titanium, and iron.

In Example 27, the subject matter of any of Examples 21 to 25 can optionally include the free magnetic layer comprising a Heusler alloy selected from the group consisting of MnXGa, MnXSn, MnXSb, MnXGa, MnXAl, MnXSi, wherein X comprises one of manganese, vanadium, chromium, titanium, and iron. In Example 28, the subject matter of Example 21 can optionally include a free magnetic layer electrode abutting the free Heusler magnetic layer and a fixed magnetic layer electrode abutting the fixed Heusler magnetic layer.

In Example 29, the subject matter of Example 28 can optionally include the fixed magnetic layer electrode electrically connected to a bit line, and a transistor electrically connected to the free magnetic layer electrode, a source line, and a word line.

In Example 30, the subject matter of Example 28 can optionally include the free magnetic layer electrode electrically connected to a bit line, and a transistor electrically connected to the fixed magnetic layer electrode, a source line, and a word line.

Having thus described in detail embodiments of the present description, it is understood that the present description defined by the appended claims is not to be limited by particular details set forth in the above description, as many apparent variations thereof are possible without departing from the spirit or scope thereof.