Title:
A DIGITAL PULSE WIDTH MODULATOR
Document Type and Number:
WIPO Patent Application WO2005011118
Kind Code:
A3
Abstract:
A DPWM (1) has a delay lock loop (4) which receives an input clock signal and provides an out-of-phase delayed clock at the output of each of eight delay cells (35). A multiplexer (5) selects one of the delay cell outputs at any one time. This allows the DPWM (1) to have eight times the resolution which would otherwise be achieved with the same input clock. A programmable module (2) has a control block (20) which interfaces with external CPU and DSP hosts and transmits programmed parameters to finite state machine controllers (15), each providing an independent output.
Inventors:
O'MALLEY EAMON (IE)
RINNE KARL (IE)
RINNE KARL (IE)
Application Number:
PCT/IE2004/000101
Publication Date:
May 06, 2005
Filing Date:
July 26, 2004
Export Citation:
Assignee:
UNIV LIMERICK (IE)
O'MALLEY EAMON (IE)
RINNE KARL (IE)
O'MALLEY EAMON (IE)
RINNE KARL (IE)
International Classes:
H02M3/335; H03K5/13; H03K7/08; H03L7/081; H03K5/00; (IPC1-7): H03K7/08
Domestic Patent References:
| WO2003050637A2 | 2003-06-19 | |||
| WO2003005779A1 | 2003-01-16 |
Foreign References:
| US5594631A | 1997-01-14 |
Other References:
DANCY A P ET AL: "HIGH-EFFICIENCY MULTIPLE-OUTPUT DC-DC CONVERSION FOR LOW-VOLTAGE SYSTEMS", IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, IEEE INC. NEW YORK, US, vol. 8, no. 3, June 2000 (2000-06-01), pages 252 - 263, XP000975683, ISSN: 1063-8210
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