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Title:
DIGITAL SIGNAL MIXING ARCHITECTURE
Document Type and Number:
WIPO Patent Application WO/1998/032223
Kind Code:
A2
Abstract:
An improved digital signal mixing architecture (100) for applications such as digital mixing consoles (76) is provided. The architecture provides a software configurable mixing system that is expanded up to more than 48 channels. The architecture comprises a master DSP (12) device coupled to a plurality of slave DSP devices (10) on a DMA bus (28). The master DSP (12) is interconnected to each of the slave DSPs (10) in a manner that enables the master DSP (12) to command each of the slave DSPs (10) to write the results of its input signal processing to the internal memory of each of the other slave DSPs (10). The master DSP (12) commands the slave DSPs (10) to transmit processed input signals to each other, so that each processed input signal is stored in the memory of each slave DSP (10). Once each slave DSP (10) has the results of every processed input signal, the master DSP (12) commands any combination of the slave DSPs (10) to mix any of the processed input signals to create a mixed signal that is sent to its outputs for conversion to an analog signal (18b). Mixing combinations are controlled by scripts that are interpreted by software. The digital mixing architecture (100) provides a system that is software configurable, so that mixing console is easily reconfigurable and upgradeable.

Inventors:
MACKIE GREG C
WATTS PETER F
TUDOR ROBERT J
Application Number:
PCT/US1998/000689
Publication Date:
July 23, 1998
Filing Date:
January 15, 1998
Export Citation:
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Assignee:
MACKIE DESIGNS INC (US)
International Classes:
H03H17/00; H04H60/04; (IPC1-7): H03G/
Foreign References:
US5581480A1996-12-03
US5361373A1994-11-01
US5212733A1993-05-18
US4845660A1989-07-04
Attorney, Agent or Firm:
Bergstrom, Robert W. (Suite 2600 520 Pike Stree, Seattle WA, US)
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Claims:
The invention in which an exclusive right is claim
1. ed is defined by the following: A real time system for digitally processing and mixing audio signals, comprising: (a) a computer that includes a memory and a processor; (b) an analog to digital converter that converts an input audio signal into a corresponding digital signal; (c) a digital signal processor that processes the digital signal as a function of at least one predefined coefficient, producing a processed signal; (d) a mixer control that produces a value employed by the computer to control the digital signal processor; (e) a script that is implemented by the computer, the script defining the operation of the mixer control and the digital signal processor; and (f) a digital to analog converter that converts the processed signal into an output.
2. A real time system for digitally processing and mixing audio signals, comprising: (a) a computer that includes a memory and a processor; (b) an analog to digital converter that converts an input audio signal into a corresponding digital signal; (c) a slave digital signal processor that processes the digital signal as a function of at least one predefined coefficient, producing a processed signal; (d) a master digital signal processor that calculates the predefmed coefficient for the slave processor, the master digital signal processor and the slave digital signal processor being coupled to a data bus; (e) a mixer control that produces a value employed by the computer to control the master digital signal processor; (f) a script that is implemented by the computer, the script defining the operation of the mixer control, the master digital signal processor, and the slave digital signal processor; and (g) a digital to analog converter that converts the processed signal into an output.
3. A real time system for digitally processing and mixing audio signals, comprising: (a) a computer that includes a memory and a processor; (b) a slave digital signal processor that processes a digital signal as a function of at least one predefined coefficient, producing a processed signal; (c) a master digital signal processor that calculates the predefined coefficient for the slave processor, the master digital signal processor and the slave digital signal processor being coupled to a data bus; (d) a mixer control that produces a value employed by the computer to control the master digital signal processor; and (e) a script that is implemented by the computer, the script defining the operation of the mixer control, the master digital signal processor, and the slave digital signal processor, so that the processed signal is provided as an output.
Description:
INTERNATIONAL SEARCH REPORT International application No. PCT/US98/00689 A. CLASSIFICATION OF SUBJECT MATTER IPC (6): H03H 7/30; G06F 17/00 US CL: 375/229, 364/400.01,381/119; 395/800.01 According to International Patent Classification (IPC) or to both national classification and IPC B. FIELDS SEARCHED Minimum documentation searched (classification system followed by classification symbols) U. S.: 375/229; 364/400.01,514R, 900; 381/119 ; 395/800, 800.01,800.39,800.35 Documentation searched other than minimum documentation to the extent that such documents are included in the fields searched Electronic data base consulted during the international search (name of data base and, where practicable, search terms used) APS: (DSP, Analog-to-Digital, Mixer, real-time, Audio mixer, script, DMA, reconfiguration, mixed signals, coefficients, Digital-to- Analog) C. DOCUMENTS CONSIDERED TO BE RELEVANT Category* Citation of document, with indication, where appropriate, of the relevant passages Relevant to claim No. Y US 5,581,480 A (OLSON et al) 03 December 1996, see claims 16,1-3 and 17, figure 2, column 1, lines 33-64. Y US 5,361,373 A (GILSON) 01 November 1994, see claim 1, figures 2-3 1, and 3-4, column 7, lines 5-17. X US 5,212,733 A (DEVITT et al) 18 May 1993, see claims 1-5.1 column 2, lines 27-50, column 4, lines 1-35, columns 5-6, lines 52- Y 67, and 1-8 respectively. 2-3 X US 4,845,660 A (LUC et al) 04 July 1989, see claim 1, abstract, 1-3 figures 1-7 and 12-13, columns 1-2, lines 41-61, and 5-12 respectively. Further documents are listed in the continuation of Box C. j j Sec patent family annex. Special categorie of citod documenu :'T'leter document published after the international filing date or priority date and not in conflict with the application but cited to understand the principle or theory underlying the invention to be of particular relevance earlier document published on or after the international Cling date X document of particular relevance ; the claimed invention cannot be considered ovel or cannot be considered to involve an inventive step document which may throw doubts on priority claim (s) or which is when the document is taken alone cited to establuh the publication date of another citation or other special reason (as specified) Y-document of particular relevance ; the claimed invention cannot be considered to involve an invenuve step when the document is '0'document referring to an oral disclosure, UM, exhibition or other combined with one or more other auch documents, such combination meant being obvious to a person skilled in the art the priontv dat ciaUed t-document member of the ame patent family thepriority date claimed Date of the actual completion of the intemational search Date of mailing of the international search report 26 MARCH 1998 0 7 4 58 Name and mailing address of the ISA/US Autho o ice Commissioner of Patents and Trademarks BoxPCT J SEPH ROUNDTREE Washington, D. C. 20231 Facsimile No. (703) 305-3230 Telephone No. (703) 306-3033