DIMMABLE BALLAST CONTROL INTEGRATED CIRCUIT

RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. Provisional Application No. 60/725,707 entitled DIMMABLE BALLAST CONTROL IC filed October 12, 2005, the entire contents of which are hereby incorporated by reference herein.

BACKGROUND

1. Field of the Invention

[0002] The, present invention relates to a ballast control IC, particularly for driving fluorescent lamps, and more particularly to a ballast control IC with an operational amplifier incorporated into the ballast control IC.

2. Related Art

[0003] Electronic ballasts for gas discharge circuits have come into widespread use, at least in part to the availability of power MOSFET switching devices and insulated gate bipolar transistors (IGBTs) that can replace previously used power bipolar switching devices. A number of integrated circuits have been devised for driving the gates of power MOSFETs or IGBTs in electronic ballasts. Some examples include the IR 2155, ffi.2157, IR21571 and IR2167 products which are sold by International Rectifier Corporation, the assignee of the present application. These products are further described in U.S. Patent Nos. 5,545,955 and 6,211,623 the disclosures of which are hereby incorporated by reference herein.

[0004] One of the features that is useful in electronic ballasts is the ability to dim the fluorescent lamp. While IC control circuits have been introduced that

include this feature, such circuits provide only a very specific manner of achieving ballast control. That is, these conventional control ICs lack flexibility . For example, the IR21592, another product of the assignee, International Rectifier Corporation, provides for dimming of a fluorescent lamp, however, dimming is accomplished by means of phase control regulation. While this solution provides adequate dimming, the function of the IC remains limited.

[0005] Thus, it would be desirable to provide a control IC for a ballast with increased flexibility that allows for increased functionality such as by including an operational amplifier that is integrated directly into the IC to provide for dimming or other functionality.

SUMMARY OF THE INVENTION

[0006] It is an object of the present invention to provide an electronic ballast with increased functionality.

[0007] An IC for controlling a power supply circuit for delivering power to a fluorescent lamp in accordance with an embodiment of the present invention includes a ballast control section operable to provide drive signals to the power supply circuit and an amplifier section integrated into the IC and operable to provide a dimming signal to the ballast control section. The ballast control section drives the power supply circuit to provide for dimming of the lamp based on the dimming signal.

[0008] An IC for controlling a power supply circuit for delivering power to a fluorescent lamp in accordance with another embodiment of the present application includes a ballast control section operable to provide drive signals to the power supply circuit; and an amplifier section integrated into the IC. The ballast control section provides the drive signals to the power supply circuit, receives current sense signals indicative of current in said lamp, and responds to the current sense signals by modifying the drive signals.

[0009] Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Fig. 1 is a schematic diagram showing a typical application of the ballast control IC of the present invention.

[0011] Fig. 2 is a schematic block diagram of the ballast control IC of Fig. 1.

[0012] Fig. 3 is a state diagram showing the operating modes of the ballast control IC of Fig. 1.

[0013] Fig. 4 shows the lead assignments and definitions of the ballast control IC of Fig. 1.

[0014] Fig. 5 shows timing diagrams for the ballast section of the ballast control IC of Fig. 1.

[0015] Fig. 6 shows start-up and supply circuitry.

[0016] Fig. 7 is a graph showing Vcc supply voltage versus time during startup.

[0017] Fig. 8 is a schematic block diagram showing preheat circuitry.

[0018] Fig. 9 is a timing diagram relative to the preheat and oscillator functions.

[0019] Fig. 10 shows ignition circuitry.

[0020] Fig. 11 shows a timing diagram relative to ignition regulation.

[0021] Fig. 12 shows a timing diagram for the fault counter.

[0022] Fig. 13 is a graph of equivalent resistance verses frequency.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION

[0023] Fig. 1 illustrates a typical application for a ballast control IC in accordance with an embodiment of the present invention.

[0024] The circuit 10 in Fig. 1 illustrates pin and external connections for the ballast control IC 12 in which the circuitry of the present invention may be implemented. As illustrated, the ballast control circuit 12 is represented as a product of the assignee of the present application, International Rectifier Corporation, and is designated the IRS2158D IC. As illustrated, the IRS2158D is preferably used to drive the half bridge formed by the power MOSFETs MHS and MLS which provide power for the lamp 14. Generally, the ballast control IC 12 of the present invention has two parts. The first part is a ballast control section 12a which provides all the necessary functionality to drive the half bridge. See Fig. 2. The ballast control IC 12 further includes an amplifier section 12b which provides an independent operation amplifier that is directly embedded into the die of the ballast control IC 12. As illustrated, the pins INV, NESfV and OUT of the IC 12 are connected to the inverting input, noninverting input and output, respectively, of the operational amplifier 22 such that the inputs and output of the operational amplifier are easily accessible.

[0025] The ballast control section 12a of the ballast control IC 12 operates in substantially the same manner as the ballast control section of assignee's IR S2168D ballast control IC, which is described in detail in co-pending U.S. Patent Application Ser. No. 11/102,603 entitled PFC AND BALLAST CONTROL IC filed April 8, 2005, the entire contents of which are hereby incorporated by reference herein. While the ballast control IC 12 illustrated in Fig. 1 of the present application does not include integrated power factor correction (PFC) like the IRS2168D, such power factor correction circuitry can be easily added externally, if desired.

[0026] The amplifier section 12b of the ballast control IC 12 is integrated directly into the die of the ballast control IC 12 such that the pins INV, NINV and OUT (pin nos. 4,5 and 6) of the ballast control IC correspond to the inverting input, noninverting input and output, respectively, of the independent operational amplifier 22. See Fig. 2.

[0027] The ballast control IC 12 operates in five modes. These modes are described in further detail with reference to Fig. 3 of the present application.

Under-voltage Lock-Out Mode (UVLO)

[0028] The under-voltage lock-out mode (UVLO) is defined as the state the ballast control IC 12 is in when the logic supply voltage VCC is below the turn-on threshold of the IC. To identify the different modes of the IC, refer to the State Diagram shown in Fig. 3. The ballast control IC 12 undervoltage lock-out is designed to maintain an ultra low supply current of less than 50Qt/ A, and to guarantee that the IC is fully functional before the high- and low-side output drivers (see Fig. 2) are activated. Fig. 6 shows an efficient voltage supply using the micro- power start-up current of the control IC 12 together with a snubber charge pump from the half -bridge output (R _vcc l, C _VCC1 , C _VCC2 , C _SNUB ,D _CP1 and D _CP2 ).

[0029] The VCC capacitors (C _VCC1 and C _VCC2 ) are charged by the current through supply resistor (R _vcc ) minus the start-up current drawn by the ballast control IC 12. This resistor is chosen to set the desired AC line input voltage turn-on threshold for the ballast. When the voltage at VCC exceeds the IC start-up threshold (UVLO+ or VCCUV+) and the SD pin is below 4.5 volts, the IC turns on and LO begins to oscillate. The capacitors at VCC begin to discharge due to the increase in IC operating current (see Fig. 7). The high-side supply voltage, VB-VS, begins to increase as capacitor C _BS is charged through the internal bootstrap MOSFET 24 (see Fig. 2) during the LO on-time of each LO switching cycle. When the VB-VS voltage

exceeds the high-side start-up threshold (UVBS+ or VBSUV+), HO then begins to oscillate. This may take several cycles of LO to charge VB-VS above VBSUV+ due to RDS on of the internal bootstrap MOSFET 24.

[0030] When LO and HO are both oscillating, the external MOSFETs (MHS and MLS) of the half bridge are turned on and off with a 50% duty cycle and a non- overlapping deadtime of 1.6μs. The half -bridge output (pin VS) begins to switch between the DC bus voltage and COM. During the deadtime between the turn-off of LO and the turn-on of HO, the half-bridge output voltage transitions from COM to the DC bus voltage at a dv/dt rate determined by the snubber capacitor (C _SNUB ). As the snubber capacitor charges, current will flow through the charge pump diode (P _CP∑ ) ^t0 VCC. After several switching cycles of the half -bridge output, the charge pump and the internal 15.4V zener clamp of the IC take over as the supply voltage. Capacitor C _VCC2 supplies the IC current during the VCC discharge time and should be large enough such that VCC does not decrease below UVLO- (VCCUV-) before the charge pump takes over. Capacitor C _vccl is provided for noise filtering and is placed as close as possible and directly between VCC and COM, and should not be lower than O.lμF. Resistors R ₁ and R ₂ are recommended for limiting high currents that can flow to VCC from the charge pump during hard-switching of the half -bridge or during lamp ignition. The internal bootstrap MOSFET 24 and supply capacitor (C _BS ) comprise the supply voltage for the high side driver circuitry. During UVLO mode, the high- and low-side driver outputs HO and LO are both low, the internal oscillator is disabled, and pin CPH is connected internally to COM for resetting the preheat time.

Preheat Mode (PH)

[0031] The control IC 12 enters preheat mode when VCC exceeds the UVLO positive-going threshold (UVLO+/VCCUV+). The internal MOSFET 26 that connects pin CPH to COM (see Fig. 2) is turned off and an external resistor R _0PJ1 (Fig. 8) begins to charge the external preheat timing capacitor (C _pH ). LO and HO begin to oscillate at a higher soft-start frequency and ramp down quickly to the preheat frequency. The VCO pin is connected to COM through an internal MOSFET Ml (see Fig. 8) so the preheat frequency is determined by the equivalent resistance at the FMIN pin formed by the parallel combination of resistors R ₁ ^ _1N and R _PH . The frequency remains at the preheat frequency until the voltage on pin CPH exceeds 2/3* VCC and the IC enters Ignition Mode. During preheat mode, the over-current protection on pin CS and the 60-cycle consecutive over-current fault counter are both enabled.

Ignition Mode (IGN)

[0032] The ballast control IC 12 ignition mode is defined by the second time CPH charges from 1/3* VCC to 2/3* VCC. When the voltage on pin CPH exceeds 2/3* VCC for the first time, pin CPH is discharged quickly through an internal MOSFET down to 1/3*VCC (see Figures 9 and 10). The internal MOSFET turns off and the voltage on pin CPH begins to increase again. The internal MOSFET Ml at pin VCO turns off and resistor R _PH is disconnected from COM. The equivalent resistance at the FM-N pin increases from the parallel combination (R _PH //R _FMIN ) ^t0 R _FMM ^{at a rate} programmed by the external capacitor at pin VCO (Cv _C0 ) and resistor R _PH . This causes the operating frequency to ramp down smoothly from the preheat frequency through the ignition frequency and eventually to the dim frequency discussed below. During this ignition ramp, the frequency sweeps through the resonance frequency of a lamp output stage to ignite the lamp 14.

[0033] The over-current threshold on pin CS will protect the ballast against a non-strike or open-filament lamp fault condition. The voltage on pin CS is defined by the lower half-bridge MOSEET current flowing through the external current sensing resistor RCS. This resistor programs the maximum peak ignition current (and therefore peak ignition voltage) of the ballast output stage. Should this voltage exceed the internal threshold of 1.25 V, the ignition regulation circuit discharges the VCO voltage slightly to increase the frequency slightly (see Figure 11). This cycle- by-cycle feedback from the CS pin to the VCO pin will adjust the frequency each cycle to limit the amplitude of the current for the entire duration of ignition mode. When CPH exceeds 2/3* VCC for the second time, the IC 12 enters dim mode and the fault counter becomes enabled. The ignition regulation remains active in dim mode but the IC will enter fault mode after 60 consecutive over-current faults and gate driver outputs HO, LO will be latched low as is discussed below.

Dim Mode (DIM)

[0034] Once VCC has exceeded 2/3* VCC for the second time, the IC enters dim mode. CPH continues to charge up to VCC. The operating frequency is at the minimum frequency (after the ignition ramp) and is programmed by the external resistor (R _PM1N ) at the FMTN pin and the external capacitor C _vco at the VCO pin. The frequency is minimum and the lamp current is maximum when the value at pin VCO is 2 volts.

[0035] In order to dim the lamp 14, the amplifier section 12b of the ballast control IC 12 may be used. A dimming input is provided by a dim device 18 (see Fig, 1) and is received at the noninverting input of the operational amplifier 22 (see Fig. 2) via the pin NTNV of IC 12. A signal indicative of the lamp current is provided from the current sensing resistor RCS to the inverting input of the operational amplifier 22 via pin INV. When the lamp current signal is lower than the

dimming input, the output of the operational amplifier 22, which is provided at pin OUT, increases. The equivalent parallel resistance provided by R ₁ J _M1N and R _ouτ also increase, which causes the frequency to decrease and the lamp current to increase. Conversely, when the lamp current signal is greater than the dimming input, the output of the operation amplifier 22 at the pin OUT decreases. The equivalent parallel resistance provided by R _PM1N and R _ouτ also decreases, which causes the frequency to increase and the lamp current to decrease. The minimum dim frequency is set by the value of the resistor R ₁ ^ _N . The maximum dim frequency is determined by the value of R _FMU Z/R _OUT - This minimum and maximum should be set with a wide enough margin so that the control loop including the operational amplifier 22 can regulate the lamp current to the desired minimum and maximum levels.

[0036] Should hard-switching occur at the half-bridge at any time (open- filament, lamp removal, etc.), the voltage across the current sensing resistor (RCS) will exceed the internal threshold of 1.25 volts and the fault counter will begin counting (see Fig. 12). Should the number of consecutive over-current faults exceed 60, the IC 12 will enter fault mode and the HO and LO outputs will be latched low. During dim mode, the end-of-life (EOL) window comparator and the DC bus under- voltage reset are both enabled.

SD/EOL and CS Fault Mode (FAULT)

[0037] Should the voltage at the SD/EOL pin exceed 3 V or decrease below IV during dim mode, an end-of-life (EOL) fault condition has occurred and the ballast control IC 12 enters fault mode. End of life circuitry and processing within a ballast control IC are discussed in detail in assignee International Rectifier Corporation's co-pending U.S. Patent Application Serial No. 10/875,474 entitled BALLAST CONTROL IC WITH MULTI-FUNCTION FEEDBACK SENSE filed

June 23, 2004, the entire contents of which are hereby incorporated by reference herein. In fault mode, the LO and HO driver outputs are latched off in the 'low' state. CPH is discharged to COM to allow for resetting the preheat time and VCO is discharged to COM for resetting the frequency. To exit fault mode, VCC can be decreased below UVLO- (VCCUV-, ballast power off) or the SD pin can be increased above 5 V (lamp removal). Either of these will force the IC to enter UVLO mode (see State Diagram, Fig. 5). Once VCC is above UVL0+ (VCCUV+, ballast power on) and SD is pulled above 5V and back below 3V (lamp re-insertion), the IC 12 will enter preheat mode and begin oscillating again.

[0038] The current sense function will force the IC to enter fault mode only after the voltage at the CS pin has been greater than 1.25V for 60 consecutive cycles of LO as determined by the fault event counter 28. See Fig. 2. The voltage at the CS pin is AND-ed with LO (see Figure 12) so it will work with pulses that occur during the LO on-time or DC. If the over-current faults are not consecutive, then the internal fault counter will count down each cycle when there is no fault. Should an over-current fault occur only for a few cycles and then not occur again, the counter will eventually reset to zero. The over-current fault counter is enabled during preheat and run modes and disabled during ignition mode.

Ballast Design Equations

[0039] Note: The results from the following design equations can differ slightly from actual measurements due to IC tolerances, component tolerances, and oscillator over- and under-shoot due to internal comparator response time.

Step 1: Program Minimum Frequency

[0040] The minimum frequency is programmed with the timing resistor R _PM1N at the FMIN pin as noted above. The minimum frequency is given as:

fim ⁼ TT^ _irt . _p [Hertz] (1) or (4.8e-10)-R _FMW

^R FMIN ^{= "} 7T^ TTT — [Ohms] (2) or (4.8e-10)-/ _MW

[0041] Use a graph of RFMIN vs. Frequency (Fig.13) to select R _J11N value for desired run frequency.

Step 2: Program Preheat Frequency

[0042] The preheat frequency is programmed with timing resistors R _FM1N and Rp _H . The timing resistors are connected in parallel for the duration of the preheat time. The preheat frequency is therefore given as:

[Hertz] (3)

R

R ^X PpHu — [Ohms] (4) or

[0043] Use a graph of RFMIN vs. Frequency (Fig.13) to select R _EQUIV value for desired preheat frequency. Then R _PH is given as:

Step 3: Program Preheat Time

[0044] The preheat time is defined by the time it takes for the external capacitor on pin CPH to charge up to 2/3* VCC. An external resistor (Rc _PH ) connected to VCC charges capacitor CPH. The preheat time is therefore given as:

tpH'RcPH' CpH [Seconds] (6) or

Cp _H =- ^~ [Farads] (7)

Step 4: Program Ignition Ramp Time

[0045] The preheat time is defined by the time it takes for the external capacitor on pin VCO to charge up to 2V. The external timing resistor (R _PH ) connected to FMIN charges capacitor C _vco . The ignition ramp time is therefore given as:

^t RAMP~ RpH O?CC [Seconds] (6)

or

λ-. ''RAMP , , . ,

^C vco ~— — [Farads] (7)

^K PH

Step 5: Program Maximum Ignition Current

[0046] The maximum ignition current is programmed with the external resistor RCS and an internal threshold of 1.25 V. This threshold determines the over- current limit of the ballast, which will be reached when the frequency ramps down towards resonance during ignition and the lamp does not ignite. The maximum ignition current is given as:

1.25

[Amps Peak] (9) or ^R cs

1.25

[Ohms] (10)

^ IGN

[0047] The present application has specifically described the use of the operational amplifier 22 for use in providing a dimming function, however, it should be noted that the operational amplifier may be used for most any other suitable function as well. For example, the operational amplifier 22 may be used to regulate the lamp power. In other application areas, such as high intensity discharge (HID) lamp ballasts, the operational amplifier 22 may be used to regulate the maximum lamp current during the warm up phase of operation.

[0048] Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other

uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein, but only by the appended claims.