DIMMER NOISE REDUCING CIRCUIT OF PIEZOELECTRIC TRANSFORMER

WIPO Patent Application WO/2008/001506

A1

A dimmer noise reducing circuit of piezoelectric transformer wherein vibration noise accompanying the activation/deactivation of a piezoelectric transformer can be reduced, while non-uniformity of brightness as in a liquid crystal display using a discharge lamp can be prevented. There are included a chopping circuit (21) that turns on/off an output from an input voltage source (1) in a given periodic manner; and a full-bridge circuit (2) that receives an output voltage (vb1) of the chopping circuit (21) to operate. An output from a lowpass filter (3) is supplied to a piezoelectric transformer (4), an output current of which (Io) is supplied to a discharge lamp. The full-bridge circuit (2) is controlled by a full-bridge drive circuit (5) to switch the input voltage (VB1) from the chopping circuit (21). The drive frequencies of the FETs of the full-bridge circuit (2) are decided by a voltage-controlled oscillator (9). The chopping circuit (21) is connected to a duty varying circuit (6) such that the full-bridge circuit (2) is caused to operate with its duty fixed.

NAMIKI SEIJI (JP)
YOKOTE YASUHIRO (JP)
YAMADA MINORU (JP)
MIZUTANI AKIRA (JP)
SHIMBO ATSUSHI (JP)

PCT/JP2007/000721

January 03, 2008

June 29, 2007

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TAMURA SEISAKUSHO KK (JP)
NAMIKI SEIJI (JP)
YOKOTE YASUHIRO (JP)
YAMADA MINORU (JP)
MIZUTANI AKIRA (JP)
SHIMBO ATSUSHI (JP)

H05B41/392; H05B41/24; H05B41/282

JPH10247593A	1998-09-14
JP2004265647A	2004-09-24
JPH1066353A	1998-03-06
JP2000058289A	2000-02-25
JP2000058289A	2000-02-25
JP2000223297A	2000-08-11

KIUCHI, Mitsuharu (Toranomon-Yoshiara Bldg.1-6-13, Nishi-Shinbashi,Minato-k, Tokyo 03, JP)

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