GENERATION SYSTEM

BACKGROUND

[001] Generating electricity requires generating electric power from sources of primary energy. For electric utilities in the power industry, it is the first stage in providing electricity to end users. Electricity is not freely found in nature in large quantities. Therefore, utilities typically produce electricity via power stations (also called "power plants"). For example, a plant may generate electricity using electromechanical generators that are driven by heat engines fueled by combustion (coal, natural gas, etc.) or nuclear fission but also by other means such as the kinetic energy of flowing water and wind. Other energy sources include solar photovoltaics, geothermal power, and the like.

[002] A microgrid is a localized group of electricity sources and loads that normally operates connected to and synchronous with a traditional wide area synchronous grid (e.g., a macrogrid). The microgrid is able to disconnect from the macrogrid and function autonomously as physical or economic conditions dictate. Accordingly, a microgrid is capable of integrating different sources of distributed generation, such as renewable energy sources (RES), to supply power to loads while operating in either a connected mode or a disconnected mode. The power connection between microgrid components is often performed through a direct current (DC) link or an alternating current (AC) link.

SUMMARY

[003] The example embodiments are directed to a framework for DC bus health analysis for a distributed generation system.

[004] In accordance with an example embodiment, provided is a system that may include a direct current (DC) bus including a link circuit, and a plurality of converters coupled to the DC bus. Each of the converters may be configured to operate in a voltage mode. The system may further include a controller configured to cause a selected one of the plurality of converters to operate in a current mode and inject a first perturbation current signal having a first predetermined frequency into the DC bus while maintaining voltage control of the DC bus. The system may further include a processor configured to measure a first response of the DC bus to the first perturbation current signal and estimate a first property associated with the link circuit based upon the measured first response.

[005] In accordance with another example embodiment, provided is a system that may include a direct current (DC) bus including a link circuit, and a plurality of converters coupled to the DC bus in which each of the converters have an associated virtual impedance. The system may further include a controller configured to cause a selected one of the plurality of converters to increase the virtual impedance associated with the selected converters and inject a first perturbation current signal having a first predetermined frequency into the DC bus. The system may further include a processor configured to measure a first response of the DC bus to the first perturbation current signal and estimate a first property associated with the link circuit based upon the measured first response.

[006] In accordance with another example embodiment, provided is a method which may include selecting one of a plurality of converters coupled to a direct current (DC) bus in which the DC bus including a link circuit. The method may further include injecting, by the selected converters, a first perturbation current having a first predetermined frequency into the DC bus, and measuring a first response of the DC bus to the first perturbation current signal. The method may further include estimating a first property associated with the link circuit based upon the measured first response.

BRIEF DESCRIPTION OF THE DRAWINGS

[007] FIG. 1 A illustrates a power generation system for delivering power to a load 140 in accordance with some embodiments.

[008] FIG. IB illustrates an equivalent circuit model of power generation system 100 of FIG. 1A in accordance with some embodiments.

[009] FIG. 2 illustrates a high-power DC/ AC inverter structure 200 in accordance with some embodiments.

[010] FIG. 3 illustrates a DC/AC inverter DC link capacitance structure in accordance with some embodiments.

[011] FIG. 4 illustrates a DC microgrid system configured to inject a current perturbance to analyze bus health in accordance with some embodiments. [012] FIG. 5 illustrates a system transfer function diagram for a disturbance susceptibility transfer function in accordance with some embodiments.

[013] FIG. 6 illustrates an example disturbance susceptibility plot for active voltage regulators in accordance with some embodiments.

[014] FIG. 7 illustrates a DC microgrid distributed bus health analysis model in accordance with some embodiments.

[015] FIG. 8 illustrates a method for DC microgrid distributed bus health analysis in accordance with some embodiments.

[016] FIG. 9 illustrates a method for multiple frequency DC microgrid distributed bus health analysis in accordance with some embodiments.

[017] FIG. 10 is a diagram illustrating a computing system that can be used in the examples herein in accordance with some embodiments.

[018] Throughout the drawings and the detailed description, unless otherwise described, the same drawing reference numerals will be understood to refer to the same elements, features, and structures. The relative size and depiction of these elements may be exaggerated or adjusted for clarity, illustration, and/or convenience.

DETAILED DESCRIPTION

[019] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of embodiments. However, it will be understood by those of ordinary skill in the art that the embodiments may be practiced without these specific details. In other instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the embodiments.

[020] One or more specific embodiments are described below. In an effort to provide a concise description of these embodiments, all features of an actual implementation may not be described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers’ specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure.

[021] Described herein is a DC-coupled electrical system in which a variety of possibly dissimilar energy storage (ES) elements are connected via individually controlled power conversion subsystems. Additional components of the system may include one or more AC -grid connected inverters which source or sink power from/to the grid as directed by a higher-level plant controller. Further additional components of the system may include, for example, DC-coupled solar arrays and/or DC-coupled or AC-coupled wind-turbine elements. Bus capacitance is distributed throughput DC/DC converters and DC/AC inverters connected to the shared DC link circuit with the majority of the bus capacitance located within the DC/ AC inverter (e.g., 95+%). A typical DC link capacitance value is approximately 8 mF/MW. Such capacitance cannot be generally realized as a single component. As a consequence, a typical DC link capacitance structure is formed of a series/parallel combination of capacitors and balancing resistors.

[022] During system initialization, the DC/DC voltage regulator parameters are broadcast to each DC/DC converter. It would be beneficial to dynamically determine bus stability in a periodic fashion to ensure reliable system operation. Knowledge of salient physical and control values provides insight into important bus behavior, such as bus overshoot and undershoot, during transient events. While the bus may still be marginally stable, a good estimate and control of bus voltage swings results in reliable operation with low power electronics stress level.

[023] The health of the DC link capacitors is paramount to system safety, reliability, and stability. For example, if a single capacitor starts degrading, its capacitance decreases and equivalent series resistance (ESR) increases. Such a situation causes additional heat generation and further degradation of the capacitor. Provided the exceptionally high lifetime requirement of power conversion equipment (e.g., 20 years), the ability to estimate the health of the bus capacitance would be beneficial.

[024] The example embodiments provide for online estimation of the health of bus capacitors of a DC microgrid without requiring the use of additional capacitors or other equipment by using a control system to cause one DC/DC converter of a microgrid system having a plurality of DC/DC converters to inject a perturbation current into the microgrid system and measure the response of the remaining DC/DC converters of the perturbance to determine a health of one or more capacitors of the microgrid system. In one or more embodiments, one or more additional actions may be performed based upon the health estimation such as at least one of a scheduled maintenance or a control adjustment to one or more components of the system.

[025] The example embodiments are based upon the nature of DC/DC converter power flow control in the DC microgrid system. The ES+DC/DC element is viewed from the DC side as a virtual impedance “Z” due to the nature of the multi-master voltage control.

The multi-master voltage scheme dynamically adjusts the terminal current proportionally to the difference between the internal and terminal voltages. Typically, such behavior results in a constant impedance. In one or more example embodiments, a control system dynamically changes the virtual impedance “Z” to infinity, or close enough for practical purposes to create a current disturbance of known frequency and amplitude. The effect is two-fold: (1) the bus voltage is still regulated by N-l subsystems; and (2) the bus is perturbed by a subsystem with known dynamics and known setpoints. Thus, it is possible to measure the response of the remaining voltage-controlled elements to the disturbance. As the number of voltage-mode convertors is typically high (e.g., greater than 5) it is possible to convert one or more of the voltage-mode convertors to operate as a current-mode converter to vary the aggregate voltage regulation bandwidth.

[026] FIG. 1A illustrates a power generation system 100 for delivering power to a load 140 in accordance with some embodiments. Referring to FIG. 1A, power generation system 100 includes an energy storage (ES) element 110 coupled to a DC/DC converter 120. The power flow of ES element 110 is regulated by voltage regulation logic located within DC/DC converter 120. Accordingly, the combination of ES element 110 and DC/DC converter 120 can be thought of as a variable voltage source combined with a variable output impedance.

[027] FIG. IB illustrates an equivalent circuit model 130 of power generation system 100 of FIG. 1A in accordance with some embodiments. Referring to FIG. IB, equivalent circuit model 130 includes a variable voltage source 140 in series connection with a variable output impedance 150.

[028] FIG. 2 illustrates a high-power DC/ AC inverter structure 200 in accordance with some embodiments. Referring to FIG. 2, high-power DC/AC inverter structure 200 includes DC link capacitors 210 coupled in parallel to a power stage 220. Power stage 220 includes a plurality of switching transistors S1-S6. Switching transistors Si and S4 are connected together in series and in parallel with DC link capacitors 210, switching transistors S3 and S6 are connected together in series and in parallel with DC link capacitors 210, and switching transistors S5 and S2 are connected together in series and in parallel with DC link capacitors 210. A positive bus connection 230 and a negative bus connection 240 are coupled in parallel to positive and negative buses, respectively, of high-power DC/AC inverter structure 200.

[029] Still referring to FIG. 2, a first output coupled between switching transistors Si and S4 provide a current i _a to a filter grid 250, a second output coupled between switching transistors S3 and S6 provide a current ib to filter grid 250, and a third output coupled between switching transistors S5 and S2 provide a current i _c to filter grid 250. Bus capacitance is typically distributed throughout DC/DC converters and DC/AC inverters connected to the shared DC link with the majority of bus capacitance located within the DC/AC inverter.

[030] FIG. 3 illustrates a DC/AC inverter DC link capacitance structure 300 in accordance with some embodiments. DC/AC inverter DC link capacitance structure 300 includes a positive bus line 310, a negative bus line 320, a series/parallel combination of capacitors 330A-330J and balancing resistors 340A-340J. Capacitor 330A and capacitor 330B are connected in series between positive bus line 310 and negative bus line 320, capacitor 330C and capacitor 330D are connected in series between positive bus line 310 and negative bus line 320, capacitor 330E and capacitor 330F are connected in series between positive bus line 310 and negative bus line 320, capacitor 330G and capacitor 330H are connected in series between positive bus line 310 and negative bus line 320, and capacitor 3301 and capacitor 330J are connected in series between positive bus line 310 and negative bus line 320.

[031] Still referring to FIG. 3, balancing resistor 340A and balancing resistor 340B are connected in series between positive bus line 310 and negative bus line 320, balancing resistor 340C and balancing resistor 340D are connected in series between positive bus line 310 and negative bus line 320, balancing resistor 340E and balancing resistor 340F are connected in series between positive bus line 310 and negative bus line 320, balancing resistor 340G and balancing resistor 340H are connected in series between positive bus line 310 and negative bus line 320, and balancing resistor 3401 and balancing resistor 340J are connected in series between positive bus line 310 and negative bus line 320. [032] Accordingly, capacitors 330A-330J and balancing resistors 340A-340J produce a capacitance and ESR for DC/ AC inverter DC link capacitance structure 300. If a single capacitor 330C of DC/ AC inverter DC link capacitance structure 300 starts degrading, its capacitance decreases and equivalent series resistance (ESR) increases, causing additional heat generation and degradation of capacitor 330C.

[033] FIG. 4 illustrates a DC microgrid system 400 configured to inject a current perturbance to analyze bus health in accordance with some embodiments. DC microgrid system 400 includes a first bus line 410 and a second bus line 420, a first voltage mode DC/DC converter 430 A, a second voltage mode DC/DC converter 430B, a third voltage mode DC/DC converter 430C, a first capacitor 440A, a second capacitor 440B, a third capacitor 440C, a solar power source 450, and one or more DC loads 460.

[034] A fundamental concept according to an embodiment is based on the nature of the DC/DC converter power flow control. The ES+DC/DC element is viewed from the DC side as a virtual impedance "Z" due to the nature of the multi-master voltage control. The multi-master voltage scheme dynamically adjusts the terminal current proportionally to the difference between the internal and terminal voltages. Typically, such behavior results in a constant impedance.

[035] In an embodiment, the virtual impedance is dynamically changed from "Z" to infinity (or close enough for practical purposes) to therefore create a current disturbance of a known frequency and amplitude. In one or more embodiments, one or more of first voltage mode DC/DC converter 430A, second voltage mode DC/DC converter 430B, and third voltage mode DC/DC converter 430C are selected as a perturbation unit. The selected perturbation unit, for example first voltage mode DC/DC converter 430 A, is changed from operation in a voltage mode to a current mode to create a perturbance current at a known frequency and amplitude. As a result, the bus voltage is still regulated by N-l subsystems, and the bus is perturbed by a subsystem with known dynamics and known setpoints.

[036] In one or more embodiments, the response of the remaining voltage-controlled elements to the disturbance is measured. As the number of voltage-mode converters is typically high (e.g., >5), it is possible to convert one or more to a current-mode converter to vary the aggregate voltage regulation bandwidth.

[037] To independently estimate the effective voltage regulation and plant transfer functions, it is required to match the acquired transfer functions to order-limited models. The actual plant (bus capacitor) transfer function is:

1

H(s) = sC + R

[038] The modeled plant transfer function is:

1

H(s) = sC + R

[039] The voltage regulator found within each DC/DC converter is:

K _p s + Ki

G(s) = s

[040] Following the suit:

K _pm s + K _im

G _m (s ) = s

[041] FIG. 5 illustrates a system transfer function diagram 500 for a disturbance susceptibility transfer function in accordance with some embodiments. In the diagram of FIG. 5, Kd (510) is the virtual impedance, Hd (508) is the virtual impedance filter, G(s) (504) is the voltage regulator transfer function, ICL (506) is the closed-loop current regulator transfer function, Hv (518) is the voltage sensing circuitry bandwidth, N is the number of voltage mode converters, H(s) (514) is the plant (bus capacitor) transfer function. The system transfer function diagram 500 includes an associated bus capacitance model H(s) (514), and is configured to receive an input voltage V+ (502) and produce an output voltage V (516).

[042] The disturbance susceptibility transfer function can be much simplified under these following conditions:

Hv = 1 for all frequencies (desired hardware feature)

Kd = 0 for all frequencies (this is almost true since the droop control bandwidth is on the order of Hz)

ICL is 1 for all frequencies (the current regulator is fast enough)

With ”N” voltage regulators actively balancing the DC link. [043] FIG. 6 illustrates an example disturbance susceptibility plot 600 for N = [5,4,3] active voltage regulators in accordance with some embodiments. FIG. 6 illustrates a Bode plot of magnitude 610 and phase 620 over a range of frequencies for the following parameters: w max = 5 w min = 2

C = le-3; R = 0;

Kp = 0.2 Ki = 1000;

G = Kp + Ki/s H = l/(s*C+R)

N = [5,4,3]

[044] The measured susceptibility transfer functions can be matched to the modeled system:

Although there are four parameters to be estimated, the only unknown parameter of importance is "C" -bus capacitance.

K_pm - voltage regulator proportional gain (known)

K im - voltage regulator integral gain (known)

R m - bus capacitance resistance

C - bus capacitance

The effect of Rm is likely negligible.

The transfer functions contain amplitude as a function of frequency and phase as a function of frequency. Further, the parameter "N" is known. [045] FIG. 7 illustrates a DC microgrid distributed bus health analysis model 700 in accordance with some embodiments. Model 700 includes a first DC/DC converter 710 and N-l DC/DC converters 730 coupled to a microgrid distributed bus having an associated aggregate bus capacitance model H(s) (704). Each of DC/DC converters 710 and 730 is configured to receive an input voltage V+ (712) and have outputs coupled together to produce an output aggregate voltage V (706). In the diagram of FIG. 7, each of DC/DC converters 710 and 730 include a virtual impedance Kd (724), virtual impedance filter Hd (722), voltage regulator transfer function G(s) (714), closed-loop current regulator transfer function ICL (718), and voltage sensing circuitry bandwidth Hv (720).

[046] In the illustrated embodiment, each of DC/DC converters 710 and 730 is configured to operate in a voltage mode initially, and first DC/DC converter 710 is configured by a controller to then operate in a current mode to inject a bus disturbance signal at a predetermined amplitude and frequency. The disturbance transfer function as a function of frequency is provided by the injection of current ripple onto the shared DC bus. In various embodiments, the response of the components of the bus to the current disturbance is measured to estimate capacitance of the DC link to determine the health of the DC link capacitors. Accordingly, the capacitance estimation is obtained by the intelligent manipulation of the disturbance susceptibility transfer function.

[047] Further, in various embodiments, the bus health analysis process may be executed independently of the system operation mode. That is, energy storage elements may charge or discharge, and the DC/ AC power conversion system may be providing a grid function such as frequency stabilization or peak shifting. The DC link health analytics function can be run independently due to the virtue of frequency orthogonality. Namely, linear systems, as long as a controller or any other element is not saturated, do not inherently distinguish between forcing frequencies. Accordingly, in one or more embodiments, a multi- tone analytic function may be executed which perturbs the system concurrently with multiple frequencies. In some embodiments, historical data of the measured capacitances are saved in a supervisory control and data acquisition (SCAD A) system to allow revealing of trends in DC link capacitor health for the bus.

[048] FIG. 8 illustrates a method 800 for DC microgrid distributed bus health analysis in accordance with some embodiments. For example, the method 800 may be performed by a computing system such as a web server, a user device, a database, an on- premises server, a cloud platform, a desktop PC, a mobile device, and the like. Referring to FIG. 8, in 802 the method may include fixing voltage controller gain across a DC microgrid and selecting a particular DC/DC converter of a plurality of DC/DC converters of the DC microgrid bus as a perturbation unit. In 804, the selected DC/DC converter starts perturbing the system by inserting a perturbation current of a predetermined frequency and amplitude into the DC microgrid. In 806, the computing system begins logging data including a measured response of the DC microgrid to the perturbation current after a predetermined N measurement cycles have passed. In 808, the computing system stops logging the data after N+M cycles have passed. In 810, the selected DC/DC converter stops perturbing the DC microgrid system.

[049] In 812, the computing system calculates one or more pertinent DC link properties indicative of the health of the DC link of the DC microgrid based upon the measured response and determines an aggregate DC link property from the one or more DC link properties. In a particular embodiment, the one or more DC link properties includes a capacitance of the DC link. In another particular embodiment, the one or more DC link properties may include an ESR of the DC link. In 814, the computer system uploads and the aggregate DC link property to a database of a long-term analytics system and stores the aggregate DC link property in the database. In one or more embodiments, blocks 802-814 are periodically repeated over a first predetermined period of time during a low period process.

[050] In 816, the long-term analytics system observes the aggregate DC link property to identify capacitor deteriorating trends in the DC link. In one or more embodiments, block 816 is repeated over a second predetermined period of time in a high period process. In various embodiments, it is beneficial to evaluate the system impedance at various frequencies. While the capacitance estimate should be the same, an aggregate value may result in the lowest error. In embodiments in which the analytics system may be sensitive to electrical noise, the procedure may be run for many periods (e.g., 100) to reduce the impact of noise. In particular embodiments, the analytic frequencies are in the frequency range of 1 Hz to 50 Hz.

[051] In response to determining that one or more capacitors are exhibiting a deteriorating trend in capacitance, a determination may be made to replace the component exhibiting the deterioration, or run the affected component at a reduced capacity will increase the capacity of other unaffected components to compensate for the deterioration.

[052] Further, in one or more embodiments, a process can be executed independently of the system operation mode. That is, energy storage elements may charge or discharge and the DC/ AC power conversion system may be in a state of providing a grid function such as frequency stabilization or peak shifting. The DC link health analytics function can be run independently due to the virtue of frequency orthogonality. Namely, linear systems, as long as a controller or any other element is not saturated, do not inherently distinguish between forcing frequencies. Hence, in one or more embodiments, a multi-tone analytic function may be executed which perturbs the system concurrently with multiple frequencies.

[053] FIG. 9 illustrates a method 900 for multiple frequency DC microgrid distributed bus health analysis in accordance with some embodiments. For example, the method 900 may be performed by a computing system such as a web server, a user device, a database, an on-premises server, a cloud platform, a desktop PC, a mobile device, and the like. In 902 the method may include selecting a particular DC/DC converter of a plurality of DC/DC converters in the DC microgrid distributed bus as a perturbation unit and setting a base perturbation frequency F start as a first frequency of the perturbation current. In 904, the selected DC/DC converter starts perturbing the system by inserting a perturbation current at the set perturbation frequency and a predetermined amplitude into the DC microgrid. In 906, the computing system begins logging data including a measured response of the DC microgrid to the perturbation current after a predetermined N measurement cycles have passed. In 908, the computing system stops logging the data after N+M cycles have passed. In 910, the selected DC/DC converter stops perturbing the DC microgrid system.

[054] In 912, the computing system calculates one or more pertinent DC link properties indicative of the health of the DC link of the DC microgrid based upon the measured response and determines an aggregate DC link property from the one or more DC link properties. In a particular embodiment, the one or more DC link properties includes a capacitance of the DC link. In another particular embodiment, the one or more DC link properties may include an ESR of the DC link.

[055] In 914, the perturbation frequency is increased to a second frequency (F2) and the selected DC/DC converter starts perturbing the system by inserting a perturbation current at the set second perturbation frequency and a predetermined amplitude into the DC microgrid, begins logging data including a measured response of the DC microgrid to the second perturbation current after a predetermined N measurement cycles have passed, and stops logging the data after N+M cycles have passed. In 916, the selected DC/DC converter stops perturbing the DC microgrid system. In one or more embodiments, the computing system repeats steps 1014 through 1016 through a plurality of frequencies (F_start, F2, F3,

F4, F5, ... , F stop) to increase the accuracy of bus health analysis.

[056] In 918, the computing system calculates one or more pertinent DC link properties indicative of the health of the DC link of the DC microgrid based upon the measured responses and determines an aggregate DC link property from the one or more DC link properties. In 920, the computer system uploads the aggregate DC link property to a long-term analytics system. In one or more embodiments, blocks 902-920 are periodically repeated over a first predetermined period of time during a low period process.

[057] In 922, the long-term analytics system observes the aggregate DC link property to identify capacitor deteriorating trends in the DC link. In one or more embodiments, block 922 is repeated over a second predetermined period of time in a high period process.

[058] The above embodiments may be implemented in hardware, in a computer program executed by a processor, in firmware, or in a combination of the above. A computer program may be embodied on a computer readable medium, such as a storage medium or storage device. For example, a computer program may reside in random access memory (“RAM”), flash memory, read-only memory (“ROM”), erasable programmable read-only memory (“EPROM”), electrically erasable programmable read-only memory (“EEPROM”), registers, hard disk, a removable disk, a compact disk read-only memory (“CD-ROM”), or any other form of storage medium known in the art.

[059] A storage medium may be coupled to the processor such that the processor may read information from, and write information to, the storage medium. In an alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an application specific integrated circuit (“ASIC”). In an alternative, the processor and the storage medium may reside as discrete components. For example, FIG. 10 illustrates an example computing system 1000 which may represent or be integrated in any of the above-described components, etc. FIG. 10 is not intended to suggest any limitation as to the scope of use or functionality of embodiments described herein. The computing system 1000 is capable of being implemented and/or performing any of the functionality set forth hereinabove.

[060] The computing system 1000 may include a computer system/server, which is operational with numerous other general purpose or special purpose computing system environments or configurations. Examples of well-known computing systems, environments, and/or configurations that may be suitable for use as computing system 1000 include, but are not limited to, personal computer systems, server computer systems, thin clients, thick clients, hand-held or laptop devices, tablets, smart phones, databases, multiprocessor systems, microprocessor-based systems, set top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, distributed cloud computing environments, databases, and the like, which may include any of the above systems or devices, and the like. According to various embodiments described herein, the computing system 1000 may be a tokenization platform, server, CPU, or the like.

[061] The computing system 1000 may be described in the general context of computer system-executable instructions, such as program modules, being executed by a computer system. Generally, program modules may include routines, programs, objects, components, logic, data structures, and so on that perform particular tasks or implement particular abstract datatypes. The computing system 1000 may be practiced in distributed cloud computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed cloud computing environment, program modules may be located in both local and remote computer system storage media including memory storage devices.

[062] Referring to FIG. 10, the computing system 1000 is shown in the form of a general-purpose computing device. The components of computing system 1000 may include, but are not limited to, a network interface 1010, one or more processors or processing units 1020, an input/output 1030 which may include a port, an interface, etc., or other hardware, for inputting and/or outputting a data signal to another device such as a display, a printer, etc., and a storage device 1040 which may include a system memory, or the like. Although not shown, the computing system 1000 may also include a system bus that couples various system components including system memory to the processor 1020. [063] The storage 1040 may include a variety of computer system readable media. Such media may be any available media that is accessible by computer system/server, and it may include both volatile and non-volatile media, removable and non-removable media. System memory, in one embodiment, implements the flow diagrams of the other figures. The system memory can include computer system readable media in the form of volatile memory, such as random access memory (RAM) and/or cache memory. As another example, storage device 1040 can read and write to anon-removable, non-volatile magnetic media (not shown and typically called a “hard drive”). Although not shown, a magnetic disk drive for reading from and writing to a removable, non-volatile magnetic disk (e.g., a “floppy disk”), and an optical disk drive for reading from or writing to a removable, non-volatile optical disk such as a CD-ROM, DVD-ROM or other optical media can be provided. In such instances, each can be connected to the bus by one or more data media interfaces. As will be further depicted and described below, storage device 1040 may include at least one program product having a set (e.g., at least one) of program modules that are configured to carry out the functions of various embodiments of the application.

[064] As will be appreciated by one skilled in the art, aspects of the present application may be embodied as a system, method, or computer program product. Accordingly, aspects of the present application may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, aspects of the present application may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.

[065] Although not shown, the computing system 1000 may also communicate with one or more external devices such as a keyboard, a pointing device, a display, etc.; one or more devices that enable a user to interact with computer system/server; and/or any devices (e.g., network card, modem, etc.) that enable computing system 1000 to communicate with one or more other computing devices. Such communication can occur via I/O interfaces. Still yet, computing system 1000 can communicate with one or more networks such as a local area network (LAN), a general wide area network (WAN), and/or a public network (e.g., the Internet) via network interface 1010. As depicted, network interface 1010 may also include a network adapter that communicates with the other components of computing system 1000 via a bus. Although not shown, other hardware and/or software components could be used in conjunction with the computing system 1000. Examples include, but are not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archival storage systems, etc.

[066] In these examples, the computing system 1000 may implement one or more of the response measurement, DC link property computation, long term analysis, and other functions described herein. As another example, the computing system 1000 may be attached to or otherwise coupled with a DC microgrid bus.

[067] As will be appreciated based on the foregoing specification, the above- described examples of the disclosure may be implemented using computer programming or engineering techniques including computer software, firmware, hardware or any combination or subset thereof. Any such resulting program, having computer-readable code, may be embodied or provided within one or more non-transitory computer-readable media, thereby making a computer program product, i.e., an article of manufacture, according to the discussed examples of the disclosure. For example, the non-transitory computer-readable media may be, but is not limited to, a fixed drive, diskette, optical disk, magnetic tape, flash memory, semiconductor memory such as read-only memory (ROM), and/or any transmitting/receiving medium such as the Internet, cloud storage, the internet of things, or other communication network or link. The article of manufacture containing the computer code may be made and/or used by executing the code directly from one medium, by copying the code from one medium to another medium, or by transmitting the code over a network.

[068] The computer programs (also referred to as programs, software, software applications, “apps”, or code) may include machine instructions for a programmable processor, and may be implemented in a high-level procedural and/or object-oriented programming language, and/or in assembly/machine language. As used herein, the terms “machine-readable medium” and “computer-readable medium” refer to any computer program product, apparatus, cloud storage, internet of things, and/or device (e.g., magnetic discs, optical disks, memory, programmable logic devices (PLDs)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The “machine-readable medium” and “computer-readable medium,” however, do not include transitory signals. The term “machine-readable signal” refers to any signal that may be used to provide machine instructions and/or any other kind of data to a programmable processor.

[069] The following illustrates various additional embodiments of the invention. These do not constitute a definition of all possible embodiments, and those skilled in the art will understand that the present invention is applicable to many other embodiments. Further, although the following embodiments are briefly described for clarity, those skilled in the art will understand how to make any changes, if necessary, to the above-described apparatus and methods to accommodate these and other embodiments and applications.

[070] Although specific hardware and data configurations have been described herein, note that any number of other configurations may be provided in accordance with some embodiments of the present invention (e.g., some of the information associated with the databases described herein may be combined or stored in external systems). Moreover, although some embodiments are focused on particular power grid components, any of the embodiments described herein could be applied to other types of electrical power grid components (including dams, windfarms, batteries, etc.).

[071] The present invention has been described in terms of several embodiments solely for the purpose of illustration. Persons skilled in the art will recognize from this description that the invention is not limited to the embodiments described, but may be practiced with modifications and alterations limited only by the spirit and scope of the appended claims.