Title:
DIRECT SAMPLING CIRCUIT AND RECEIVER
Document Type and Number:
WIPO Patent Application WO/2011/024481
Kind Code:
A1
Abstract:
Disclosed are a direct sampling circuit and a receiver wherein an excellent frequency characteristic is achieved by use of a relatively simple structure and simple clocks. In each of a plurality of discrete-time circuits (102-1 to 102-4), a charging switch (1021) is on/off controlled by use of one of four-phase control signals. A rotate capacitor (1022) shares, via the charging switch (1021), a charge stored in an IQ generating circuit (101). A dump switch (1023) is on/off controlled by use of another one of the four-phase control signals the phase of which is different from that of the control signal used to on/off control the charging switch (1021). A buffer capacitor (1026) shares, via the dump switch (1023), a charge with the rotate capacitor (1022), thereby forming an output value.
Inventors:
MORISHITA YOHEI
SAITO NORIAKI
SAITO NORIAKI
Application Number:
PCT/JP2010/005325
Publication Date:
March 03, 2011
Filing Date:
August 30, 2010
Export Citation:
Assignee:
PANASONIC CORP (JP)
MORISHITA YOHEI
SAITO NORIAKI
MORISHITA YOHEI
SAITO NORIAKI
International Classes:
H03H19/00; H04B1/26; H04B1/30
Domestic Patent References:
| WO2008108090A1 | 2008-09-12 |
Foreign References:
| JP2006211153A | 2006-08-10 | |||
| US20050233725A1 | 2005-10-20 |
Other References:
YOHEI MORISHITA ET AL: "Fukusogata Direct Sampling Mixer no Sekkei", THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS 2009 NEN ELECTRONICS SOCIETY TAIKAI KOEN RONBUNSHU, 1 September 2009 (2009-09-01), pages 43
Attorney, Agent or Firm:
WASHIDA, KIMIHITO (JP)
Koichi Washida (JP)
Koichi Washida (JP)
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