Title:
DISCHARGE CIRCUIT AND POWER STORAGE DEVICE
Document Type and Number:
WIPO Patent Application WO/2017/159035
Kind Code:
A1
Abstract:
A discharge circuit (10) is provided with: a first transistor (Q1) connected to a power storage unit (C1); an operational amplifier (IC1) which controls an output current of the first transistor (Q1); and a current mirror circuit (15) connected to the operational amplifier (IC1), wherein the current mirror circuit (15) has a second transistor (Q2) connected to a non-inverting input terminal (V+) of the operational amplifier (IC1), and has a third transistor (Q3) connected to the power storage unit (C1).
Inventors:
KUDO TAKAHIRO
ODAJIMA YOSHIMITSU
MITANI YOHSUKE
ODAJIMA YOSHIMITSU
MITANI YOHSUKE
Application Number:
PCT/JP2017/001885
Publication Date:
September 21, 2017
Filing Date:
January 20, 2017
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
H02J7/00
Foreign References:
| JP2008178202A | 2008-07-31 | |||
| JPS57118417U | 1982-07-22 | |||
| JP2003070178A | 2003-03-07 |
Attorney, Agent or Firm:
KAMATA Kenji et al. (JP)
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