Title:
DISPLAY DEVICE, DISPLAY CONTROL CIRCUIT, AND DISPLAY CONTROL METHOD
Document Type and Number:
WIPO Patent Application WO/2011/058795
Kind Code:
A1
Abstract:
In a display control circuit (200) of a display device, a memory control unit (22) sequentially writes image data for one frame included in a display data signal DAT into a predetermined address range of a frame memory (21) on the basis of a starting address that is calculated by a starting address calculating unit (25) and that corresponds to a position serving as a starting point on a screen set by a signal SEL for display position selection and the display resolution of the display data signal DAT determined by a resolution determining unit (23). With this, the image is not displayed on the entire display screen but can be partially displayed in a predetermined range from the starting point. This leads to display suitable for display devices for specific applications (typically, for amusements and the like).
Inventors:
OTSUBO MASASHI
Application Number:
PCT/JP2010/063385
Publication Date:
May 19, 2011
Filing Date:
August 06, 2010
Export Citation:
Assignee:
SHARP KK (JP)
OTSUBO MASASHI
OTSUBO MASASHI
International Classes:
G09G5/00; A63F7/02; G02F1/133; G09G3/20; G09G3/36; G09G5/391
Foreign References:
| JPH07234773A | 1995-09-05 | |||
| JPH07104719A | 1995-04-21 | |||
| JPH05127646A | 1993-05-25 | |||
| JPH05323899A | 1993-12-07 | |||
| JPH05297853A | 1993-11-12 |
Attorney, Agent or Firm:
SHIMADA, AKIHIRO (JP)
Akihiro Shimada (JP)
Akihiro Shimada (JP)
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