DISPLAY PANEL, METHODS OF FABRICATING AND REPAIRING THE SAME

WIPO Patent Application WO/2018/027523

A1

A display panel including an array substrate (AS) and an opposing substrate (PS) facing the array substrate (AS); a data line layer having a plurality of data lines (106) on the array substrate (AS); a passivation layer (204) on a side of the data line layer proximal to the opposing substrate (PS); a sealant layer (105) on a side of the passivation layer (204) distal to the data line layer, sealing the array substrate (AS) and the opposing substrate (PS) together; the display panel having a first area (A) enclosed by the sealant layer (105) and a second area (B) outside of the first area (A) and the sealant layer (105); the plurality of data lines (106) extending from the first area (A) into the second area (B); and a common electrode layer (206) on a side of the sealant layer (105) distal to the passivation layer (204). The common electrode layer (206) includes a portion having a plurality of connections (C), and a plurality of slits (S) spaced apart from each other by the plurality of connections (C); the plurality of slits (S) and the plurality of connections (C) extending from the first area (A) into the second area (B), each of the plurality of connections (C) is between two adjacent slits (S); each of the plurality of connections (C) has a first portion (C1) in the first area (A) and a second portion (C2) in the second area (B).

JIANG XUEBING (CN)
GAO JILEI (CN)

PCT/CN2016/094093

February 15, 2018

August 09, 2016

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BOE TECHNOLOGY GROUP CO LTD (CN)
HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO LTD (CN)

G02F1/1362

CN101435923A	2009-05-20
CN103116234A	2013-05-22
CN101359108A	2009-02-04
CN101592797A	2009-12-02
JPH08201843A	1996-08-09

See also references of EP 3497515A4

TEE&HOWE INTELLECTUAL PROPERTY ATTORNEYS (CN)

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