FIELD

[0001] The present application relates to antennas, phased arrays, beamforming, integrated circuits and programs, and to computer-implemented methods and systems relating to phased array systems.

BACKGROUND

[0002] A phased array system may include a beam forming integrated circuit (IC) and a plurality of antennas. The phased array system may use a plurality of antenna signal paths, where each antenna signal path may have a variable time delay. For phase array systems being implemented as receivers (or receiver channels in a transceiver), the beam forming circuit may use propagation delay produced by the variable time delay in each antenna signal path of signals being received by the phased array so that higher receiver gain is achieved for signals arriving from a specific direction. For phase array systems being implemented as transmitters (or transmission channels in a transceiver), the beam forming circuit may control time delay difference between successive antenna signal paths of the plurality of antennas to generate an electromagnetic beam having specific direction. The beam forming IC may use the changes in the time delay different to steer the electromagnetic beam to different directions.

SUMMARY

[0003] In some examples, a method for operating a phased array is generally described. The method may include converting a desired beam direction of a desired beam into at least one phase slope parameter. The phased array may include a plurality of antennas connected to a plurality of front-end circuits of a beam forming circuit, and each antenna may be connected to a respective front-end circuit. The method may further include, for each antenna among the plurality of antennas, determining a phase shift parameter of the antenna based on the at least one phase slope parameter and a physical location of the antenna. The method may further include, for each antenna among the plurality of antennas, mapping the determined phase shift parameter of the antenna to control settings for a front-end circuit connected to the antenna.

[0004] In some examples, a system for operating a phased array is generally described. The system may include a first device, a phased array, and a second device connected to the first device and the plurality of front-end circuits. The phased array may include a plurality of antennas connected to a plurality of front-end circuits of a beam forming circuit. The first device may be configured to convert a desired beam direction of a desired beam into at least one phase slope parameter. The first device may be further configured to send the at least one phase slope parameter to the second device. The second device may be configured to receive the at least one phase slope parameter. The second device may be further configured to, for each antenna among the plurality of antennas, determine a phase shift parameter of the antenna based on the at least one phase slope parameter and a physical location of the antenna. The second device may be further configured to, for each antenna among the plurality of antennas, map the determined phase shift parameter of the antenna to control settings for a front-end circuit connected to the antenna.

[0005] In some examples, an apparatus for operating a phased array is generally described. The apparatus may include a plurality of antennas and a beam forming circuit including a plurality of front-end circuits connected to the plurality of antennas. The beam forming circuit may be configured to receive at least one phase slope parameter from a device. The at least one phase slope parameter being based on a desired beam direction of a desired beam. The beam forming circuit may be further configured to, for each antenna among the plurality of antennas, determine a phase shift parameter of the antenna based on the at least one phase slope parameter and a physical location of the antenna. The beam forming circuit may be further configured to, for each antenna among the plurality of antennas, map the determined phase shift parameter of the antenna to control settings for a front-end circuit connected to the antenna.

[0006] Further features as well as the structure and operation of various embodiments are described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers indicate identical or functionally similar elements.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Fig. 1 A illustrates an example system that can implement distributed calculation of beamforming parameters for phased arrays in one embodiment.

[0008] Fig. 1 B illustrates another example system that can implement distributed calculation of beamforming parameters for phased arrays in one embodiment.

[0009] Fig. 2 illustrates an example mapper that can be used for implementing distributed calculation of beamforming parameters for phased arrays in one embodiment.

[0010] Fig. 3 illustrates another example mapper that can be used for implementing distributed calculation of beamforming parameters for phased arrays in one embodiment.

[0011] Fig. 4A illustrates an example antenna pattern relating to an implementation of distributed calculation of beamforming parameters for phased arrays in one embodiment.

[0012] Fig. 4B illustrates an example antenna pattern relating to an implementation of distributed calculation of beamforming parameters for phased arrays in one embodiment.

[0013] Fig. 4C illustrates an example antenna pattern relating to an implementation of distributed calculation of beamforming parameters for phased arrays in one embodiment. [0014] Fig. 5 illustrates a flow diagram relating to distributed calculation of beamforming parameters for phased arrays in one embodiment.

DETAILED DESCRIPTION

[0015] Traditionally, digital control circuits for phased array front-ends (e.g., digital control circuits for controlling parameters such as gain and phase) may each include an on-chip memory beam table, where each row of the beam table stores settings that corresponds a given beam direction. However, as the number of antenna elements in a phased array grows, beamwidth may become narrower and more beam directions are required to cover a region of interest in space. Thus, these beam tables may become larger and beam finding algorithms may need to search through a much larger number of entries in the beam tables. For example, smaller phased arrays (e.g., 16 antenna elements with approximately 20 degree beamwidth) may have relatively less entries in each beam table for each front-end circuit (e.g., less than 100 entries). However, large phase arrays (e.g., greater than or equal to 256 antennas) may have a large number of entries in each beam table for each front-end circuit. For example, a phased array with 1024 antennas with 1 degree beamwidth may have approximately 2,000 entries in each lookup table for each front-end circuit, making it impractical to search through the lookup table and requiring a relatively large on-chip area for the implementation of these lookup tables.

[0016] Fig. 1A illustrates an example system that can implement distributed calculation of beamforming parameters for phased arrays in one embodiment. The system 100 can be a radio frequency (RF) transmission system implemented by a communication device, such as a RF transmitter, a RF receiver, or a RF transceiver. The system 100 can be configured to operate at common wireless radio frequencies, millimeter-wave frequencies, and/or microwave frequencies. The system 100 can be a part of a wireless communication network, such as fourth generation (4G) wireless communications system, fifth generation (5G) wireless communications system, satellite communication system, point-to-point communications systems such as common data link, and/or other types of wireless communication networks.

[0017] The system 100 can include a circuit 101, one or more beam forming integrated circuits (ICs) 102, a plurality of antennas 103, and a circuit 112. The one or more beam forming ICs 102 and the plurality of antennas 103 may form a phased array system. The circuit 101 can be a part of a RF communication device such as a radio frequency (RF) transmitter, a RF receiver, a transmission channel of a RF transceiver, or a receiver channel of a RF transceiver. For example, the circuit 101 can include a baseband processor, mixer circuits such as up-down converters, filters, memory devices, local oscillators, digital-to-analog converters (DAC) (if the circuit 101 is a RF transmitter, or a transmission channel of a RF transceiver), analog-to-digital converters (ADC) (if the circuit 101 is a RF receiver, or a receiver channel of a RF transceiver), signal generators, microcontrollers, and/or other types of components or integrated circuits that belong to a RF communication device. The circuit 101 shown in Fig. 1 A can be configured to output RF signals to the beam forming ICs 102 when the phased array system is intended to operate as a transmitter. In examples where the circuit 101 is part of a RF transceiver or receiver, the circuit 101 can also be configured to receive RF signals from the beam forming ICs 102. The RF signals being exchanged between the circuit 101 and the beam forming ICs 102 can be radio-frequency, millimeter-wave frequency, or microwave frequency signals that can carry information or data.

[0018] The plurality of antennas 103 may include a plurality of antennas, such as antennas 103i to 103N. Each antenna among the antennas 103 may output a RF signal having a respective amplitude and phase. In an example, the system 100 can include M beam forming ICs 102 that may be identical to one another. Using a beam forming IC 102M3S an example, the beam forming IC 102M may include a circuit 120, a mapper 130, and a plurality of front-end circuits 108. Each one of the beam forming ICs 102 may include N front-end circuits 108, including front-end circuits 1081 to 108 _N . Each front-end circuit 108 may include a respective set of components, such as power amplifiers, gain control circuits, phase shifters, and/or other types of components or ICs that can implement different beamforming techniques. For example, the front-end circuit 1081 may include a gain control circuit 109i and a phase shifter 110i, and the front-end circuit 108N may include a gain control circuit 109N and a phase shifter 11 ON. Further, each front-end circuit may be connected to an antenna among the plurality of antennas 103. A phase shift control setting may be inputted to each phase shifter, among phase shifters 110i to 11 ON, to control the phase of a RF signal being outputted by a connected antenna. A gain control setting may be inputted to each gain control circuit, among gain control circuits 109i to 109N, to control the gain of a RF signal being outputted by a connected antenna. Beam steering may be implemented by adjusting the phase shifter (e.g., phase shifter 110i to 11 ON) in each one of the front-end circuits 108. The phase delays across the front-end circuits 108 may produce an interference pattern that can focus a beam in a specific direction. The beam 104 may have a field pattern and beam direction that can be based on the gain and phase parameters being set in the front-end circuits 108.

[0019] In an example, the system 100 may generate a desired beam 104 having a desired beam direction 115 and a desired amplitude r (see coordinate system 114 in Fig. 1 A). To generate the desired beam 104, the circuit 112 may first determine a set of phase slope parameters 116. In an example, the circuit 112 may be a device including components such as a field programmable gate array (FPGA) chip, or a processor such as a central processing unit (CPU) of a computing device configured to determine the set of phase slope parameters 116. The set of phase slope parameters 116 may include a first phase slope parameter denoted as a, and a second phase slope parameter denoted as p. The circuit 112 may determine the set of phase slope parameters 116 based on a beam angle of the desired beam direction 115, a wavelength of the desired beam 104, and spacing between the plurality of antennas 103. The beam angle of the desired beam direction 115 may include angular components 0 and cp. The circuit 112 may determine the phase slope parameter a based on 0 and <p, a wavelength A of the desired beam 104, and a minimum unit spacing between the plurality of antennas 103 in the x-direction, denoted as dx. The circuit 112 may determine the phase slope parameter p based on 0 and <p, a wavelength A of the desired beam 104, and a minimum unit spacing between the plurality of antennas 103 in the y-direction, denoted as dy. In an example, the following expressions may represent the relationships among a, p, 0, <p, A, dx, and dy. 360° a = dx sin (0) cos (<p) — - —

A

360° p = dy sin (0) sin (<p) — - —

A

In an example, the set of specific N locations 118 of the antennas 103 supported by each beamforming IC 102M can be represented as a matrix LM that contains a pair of coordinates q _x , q _y for each of the N antennas.

[0020] The set of phase slope parameters 116 may be inputted to each one of the beam forming ICs 102. In addition, the set of antenna locations 118 may be inputted to each corresponding beamforming IC 102 _M . In an example, the circuit 112 may broadcast the set of phase slope parameters 116 to the beam forming ICs 102. The circuit 120 of each beam forming IC 102 may receive the set of phase slope parameters 116 from the circuit 112. The circuit 120 of each beam forming IC may receive the set of N antenna locations 118 from the circuit 112. The circuit 120 of the beam forming IC 102 may be configured to determine a phase shift parameter 122, denoted as cpj, for each i-th antenna among the plurality of antennas 103, where i = 1 ...N. In an example, the phase shift parameter 122 may be an ideal phase shift required for a connected front-end circuit or antenna. For example, the phase shift parameter cpj for the i-th antenna may be an ideal phase shift required for the i-th antenna to contribute to forming the desired beam 104 in the desired beam direction 105. The circuit 120 may determine the phase shift parameter 122 for each antenna based on the set of phase slope parameters 116 and a physical location of the corresponding antenna. For example, the circuit 120 may determine (pi for antenna 103i based on a, p, and a physical location of the antenna 103i . The circuit 120 may send the phase shift parameter 122 to the mapper 130. In an example, the following expressions may represent the relationships among a, p, and (ft: where (p _xy denotes a i-th antenna located at a point (x,y) on a x-y plane (see coordinate system 114), q _x denotes the location of the i-th antenna in the x direction, and q _y denotes the location of the i-th antenna in the y direction.

[0021] Note that the circuit 112 may be implemented off-chip (e.g., outside of the beam forming ICs 102), such that the calculation or determination of the set of phase slope parameters 116 may be performed off-chip. The calculation or determination of the phase shift parameter 122 may be performed by the circuit 120 in the beam forming ICs 102. By offloading the calculation of the set of phase slope parameters 116 to the circuit 112, the beam forming ICs may consume relatively less power because the nonlinear nature of the calculation of the set of phase slope parameters 116 may require more power than linear calculations (e.g., calculation of the phase shift parameter 122). For example, the calculations of the set of phase slope parameters 116 may be trigonometric, and frequency-dependent. By offloading the calculation of the set of phase slope parameters 116 to the circuit 112, the beam forming ICs (e.g., beam forming ICs 102) may require less area and the overall calculations may be performed faster. [0022] Note that performing the calculation of the set of phase slope parameters 116 based on a minimum unit antenna spacing (with an accuracy only limited by the number of bits used for its representation) and performing the calculation of the phase shift parameter 122 based on specific antenna locations 188 enables supporting a large variety of antenna array configurations, including configurations in which the antennas are not placed on a grid with uniform spacing.

[0023] Note further that while the set of calculations to determine the set of phase slope parameters 116 depends on the desired beam direction 115 (e.g. a separate calculation is required for each beam direction), the set of N antenna locations 118 is not expected to change dynamically. Therefore, in an example, each set of N antenna locations 118 is inputted into the corresponding beamforming IC 102 _M only once during system initialization

[0024] In an example, the mapper 130 may be a circuit including one or more of processing elements, lookup tables, memory devices, and/or ICs such as decoders. The mapper 130 may be configured to map each cpj to different control settings for the front-end circuits 108. For example, the mapper 130 may map (pi to a control setting including a gain control setting 1321 and a phase shift control setting 134i, and may input the control settings 132i, 134i, to the front-end circuit 108i . In an example, the mapper 130 may include a lookup table storing associations between different values of cpj and different control settings (e.g., different values of phase and gain control settings). In another example, the mapper 130 may include multiple lookup tables, such as one lookup table for each front-end circuit 108, storing associations between different values of (ft for an i-th antenna and different control settings. In another example, the mapper 130 may implement static random access memory (SRAM) devices to store the associations. The different control settings being mapped to the front-end circuits 108 may configure the plurality of antennas 103 to generate the desired beam 104.

[0025] Another example embodiment of the system 100 is shown in Fig. 1B. In the example shown in Fig. 1B, the antennas 103 may form a receiver beam 117, and each antenna among the antennas 103 may receive an RF signal. The front-end circuits 108 may further include components of a receiver channel, such as a band-pass filter for reducing image response, an RF amplifier or low-noise amplifier (LNA) for amplifying weak signals without contaminating them with noise, a local oscillator (LO) for generating an LO signal to be mixed with RF signals received in the direction of beam 117, and a mixer that mixes the LO signal with the RF signals received in the direction of beam 117. For simplicity purposes, Fig. 1B shows RF amplifiers 107i, 1072, 107N in the front-end circuits 1081, IO82, 108N, respectively, to depict receiver channels being implemented by the front-end circuits 108. The front-end circuits 108 may include switches to switch between a transmission mode and a receiving mode of the front-end circuits 108. A phase shift control setting may be inputted to each phase shifter, among phase shifters 110i to 11 ON, to control the phase of a RF signal being received by a connected antenna. A gain control setting may be inputted to each gain control circuit, among receiver gain control circuits 107i to 107N, to control the gain of a RF signal being received by a connected antenna. Beam steering may be implemented by adjusting the phase shifter (e.g., phase shifter 110i to 110 _N ) in each one of the front-end circuits 108. The phase delays across the front-end circuits 108 may cause signals to combine coherently when they arrive at the antenna array from a specific direction, forming a receiver beam in that direction. The signal combiner is not shown for simplicity. The beam 117 may have a field pattern and beam direction that can be based on the gain and phase parameters being set in the front-end circuits 108.

[0026] received by the corresponding antenna 103N. The circuit 120 may determine the slope parameters 127 OR and P that correspond to the receiver beam 117 and may send these parameters to the circuit 112. The circuit 120 of the beam forming IC 102 may be configured to determine a phase shift parameter 122, denoted as (ft, for each i-th antenna among the plurality of antennas 103, where I = 1 ...N. The circuit 120 may determine the phase shift parameter 122 for each antenna based on the set of receive phase slope parameters 127 and a physical location of the corresponding antenna. The circuit 120 may send the phase shift parameter 122 to the mapper 130. The mapper 130 may map the desired phase shift parameter cpj for each antenna to a set of corresponding frontend control settings and input these settings to each front-end 108. In an example, the control settings for front-end 1081 corresponding to a phase shift parameter (pi include a phase shifter control setting 134i and a receiver gain control setting 134i.

[0027] Fig. 2 illustrates an example mapper that can be used for implementing distributed calculation of beamforming parameters for phased arrays in one embodiment. In an example shown in Fig. 2, the mapper 130 may include a decoder 202 and a mapping table 204. In an example, the mapping table 204 may be implemented as a lookup table that translates different values of the phase shift parameter 122 into different control settings. In another example, the mapping table 204 may be implemented as a SRAM device storing associations between different values of the phase shift parameter 122 and different control settings. In another example, the mapping table 204 may be a data structure, or data stored in memory, or a database received from another processor or another device. The mapping table 204 may include k entries, denoted as entries Ei to Ek, where k is less than a number of possible beam directions that can be achieved by the plurality of antennas 103. Each entry in the mapping table 204 may store a control setting including a phase control parameter and a gain control parameter. [0028] The decoder 202 may include circuitry configured to map the phase shift parameters 122 (see Fig. 1A), denoted as $i to cp _N , to entries among the mapping table 204. For example, the decoder 202 may map the phase shift parameters (ft, $2, fti to the entries E3, Ek, and E1, respectively. In some examples, more than one phase shift parameters 122 may be mapped to one entry in the mapping table 204. Referring to the example in Fig. 1A, the entry E3 in Fig. 2 may store the gain control parameter 1321 and the phase control parameter 134i, and the entry E1 in Fig. 2 may store the gain control parameter 132N and the phase control parameter 134N. In response to the decoder 202 mapping all phase shift parameters 122 to the entries among the mapping table 204, the mapper 130 may load or distribute the control settings in the mapped entries to the front-end circuits 108. For example, the mapper 130 may load the entries E3, Ek, and E1, to the front-end circuits 1081, 1082, and 108 _N , respectively. In an example, a latch may be connected between the mapper 130 and each one of the front-end circuits 108 (e.g., total of N latches in each beam forming IC 102). For example, latches 206i, 2062, and 206 _N may be connected between the mapper 130 and the front-end circuits 1081, 1082, and 108N, respectively. The latches connected between the mapper 130 and the front-end circuits 108 may facilitate a loading operation of the entries from the mapper 130 to the front-end circuits 108. For example, the entries E3, Ek, and E1 may be loaded to the front-end circuits 1081, IO82, 108N, sequentially (e.g., one at a time). Thus, in the example shown in Fig. 2, a first load operation may store the entry E3 in the latch 206i , a second load operation may store the entry Ek in the latch 2O62, and a N-th load operation may store the entry E1 in the latch 206N. In response to storing N entries in the N latches, the front-end circuits 108 may realize the phase and gain parameters necessary to produce the desired beam 104. Different combinations of entries in the mapping table 204 may result in different beam directions. Note that the mapping table 204 being shared by the front-end circuits 108 may occupy relatively less space when compared to conventional approaches that may assign one beam table to each front-end circuit.

[0029] In an example, the value of k, and the phase control parameter in the entries E1 to Ek in the mapping table 204, may be dependent on a desired implementation of the system 100. For example, the value of k can be 72 such that the mapping table 204 includes 72 rows or entries, and the phase control parameter in the entries E1 to Ek may increment at intervals of 5 degrees. For example, the phase control parameter in the entry E1 may be 5 degrees, the phase control parameter in the entry E2 may be 10 degrees, and the phase control parameter in the entries E _k may be 360 degrees. If a phase shift parameter 122 for an i-th antenna is 15 degrees, then an entry E3 having a phase control parameter of 15 degrees may be mapped to cpj. If a phase shift parameter 122 for an i-th antenna is 50 degrees, then an entry E10 having a phase control parameter of 50 degrees may be mapped to (ft. If a phase shift parameter 122 for an i-th antenna is 13 degrees, then the decoder 202 or the mapper 130 may select, for example, an entry having a phase control parameter that may be closest to 13 (which in this example, may be entry E3 having phase control parameter of 15 degrees). In an example, the value of k may be increased to increase the number of entries in the mapping table 204, thus providing more precise mapping of the phase shift parameter 122 to control settings in the mapping table 204.

[0030] Fig. 3 illustrates another example mapper that can be used for implementing distributed calculation of beamforming parameters for phased arrays in one embodiment. In an example shown in Fig. 3, the mapper 130 may include a decoder 302 and N mapping tables, including mapping table 304i, 3042...304N. In an example, the mapping tables 304i to 304N may be implemented as lookup tables that translates different values of the phase shift parameter 122 into different control settings of a specific antenna. In another example, the mapping tables 304i to 304N may be implemented as SRAM devices that store different values of the phase shift parameter 122 and different control settings of a specific antenna. For example, entries in the mapping table 304i may translate different values of $1 to different control settings for the antenna 103i . Each one of the mapping tables 304i to 304N may include j entries, denoted as entries E1 to Ej, where j is less than a number of possible beam directions that can be achieved by the plurality of antennas 103 Each entry in the mapping tables 304i to 304 _N may store a control setting including a phase control parameter and a gain control parameter for a specific antenna. For example, entries in the mapping table 304i may include entries storing different values of the gain control parameter 132i and phase control parameter 134i for the antenna 103i.

[0031] The decoder 302 may include circuitry configured to map each one of the phase shift parameters 122, denoted as (pi to $N, to entries in a corresponding mapping table among the mapping tables 304i to 304N. For example, the decoder 302 may map the phase shift parameter $N to one of the entries (e.g., indicated by the shading in Fig. 3) in mapping table 304 _N . In response to the decoder 302 mapping all phase shift parameters 122 to an entry in each one of the mapping tables 304i to 304 _N , the mapper 130 may load or distribute the control settings in the mapped entries to the corresponding front-end circuits 108. For example, the mapper 130 may load the entry mapped to (pi in the mapping table 304i (e.g., the shaded entry in Fig. 3) to the front-end circuit 1081. Different combinations of entries from each one of the mapping tables 304i to 304N may result in different beam directions. Note that the mapping tables 304i to 304N may be smaller than conventional beam tables that map one entry to one beam direction. Thus, the embodiment shown in Fig. 3 may provide smaller mapping tables and also may provide compensation of potential element-to-element mismatches within the beam forming ICs 102 since each front end has an individual set of mapping values stored in the corresponding tables 304i to 304N.

[0032] In an example, the value of j, and the phase control parameter in the entries Ei to Ej in the mapping tables 304i to 304 _N , may be dependent on a desired implementation of the system 100. For example, the value of j can be 72 such that each one of the mapping tables 304i to 304N includes 72 rows or entries, and the phase control parameter in the entries Ei to Ej may increment at intervals of 5 degrees. For example, the phase control parameter in the entry Ei may be 5 degrees, the phase control parameter in the entry E2 may be 10 degrees, and the phase control parameter in the entries Ej may be 360 degrees. If a phase shift parameter 122 for an i-th antenna is 15 degrees (e.g., cpj = 15), then an entry E3 in the mapping table 304 having a phase control parameter of 15 degrees may be mapped to eft. If a phase shift parameter 122 for an i-th antenna is 50 degrees, then an entry E10 in the mapping table 304 having a phase control parameter of 50 degrees may be mapped to cpj. If a phase shift parameter 122 for an i-th antenna is 13 degrees, then the decoder 302 or the mapper 130 may select, for example, an entry in the mapping table 304 having a phase control parameter that may be closest to 13. In an example, the value of j may be increased to increase the number of entries in the mapping tables 304i to 304N, thus providing more precise mapping of the phase shift parameter 122 to control settings in the mapping tables 304i to 304N.

[0033] The methods and systems described herein may use smaller mapping tables for large phased arrays, such as mapping tables that have a number of entries being smaller than a number of possible beam directions that can be formed by a phased array. For example, each entry among the mapping tables (e.g., 204 and 304i to 304N) shown in Fig. 2 and Fig. 3 may be mapped to different values of an ideal phase shift parameter (e.g., (ft) instead of being mapped to one beam direction. Thus, the size of the mapping tables may not be dependent on the number of antenna elements or the number of beam directions. For example, the number of entries in the mapping tables of the system 100 may be less than the number of possible beam directions. Further, the ideal phase shift parameter may be determined based on physical locations of the antennas, allowing the methods and systems to be implemented in phased array systems having different operating frequencies or phase shifter implementations. Furthermore, phase slope parameters (e.g., a and p) that may require nonlinear calculations are distributed to an off-chip device, where computing resources may be more abundant than the beam forming IC. Thus, latency, and power consumption, and input/output (I/O) operations between the off-chip device and the beam forming IC, may be reduced since the values of the phase slope parameters may be broadcasted to multiple beam forming chips using a single clock transaction.

[0034] Fig. 4A to Fig. 4C illustrate examples of antenna patterns relating to an implementation of distributed calculation of beamforming parameters for phased arrays in one embodiment. In an example, the plurality of antennas 103 of Fig. 1A to Fig. 3 may have the antenna pattern 400 shown in Fig. 4A. The antenna pattern 400 may be a 8x8 uniform array having 64 antennas (e.g., N = 64). An antenna 402i may be located at a position (-7, - 7), or x = -7 and y = -7, An antenna 40264 may be located at a position (7, 7), or x = 7 and y = 7. These position values may be used for the calculation of the phase shift parameter 122 (see Fig. 1 A). Further, these position values may represent positions of the antennas among the plurality of antennas 103 normalized to a resolution or an antenna pitch of the antenna pattern 400. For example, the antenna pattern 400 may have a resolution of 0.5A (A being the wavelength of the desired beam 104), and a number of bits in the fractional representation of the antenna positions of the antenna pattern 400 can be 1 . The calculation of the phase shift parameter 122 may not be affected by changes in the resolution since the exact positions of the antennas are being used for the calculation. However, changes in the number of bits in the fractional representation of the antenna positions may affect the calculation of the phase shift parameter 122 since the antenna positions may change.

[0035] For example, another antenna pattern 410 is shown in Fig. 4B. The antenna pattern 410 may be a 8x8 array with multiple 4x4 sub-arrays having different spacing from one another. The antenna pattern 410 may have a resolution of 0.25, and a number of bits in the fractional representation of the antenna positions of the antenna pattern 410 can be 2. Another antenna pattern 420 is shown in Fig. 4C. The antenna pattern 420 may be a circular array with a normalized radius of 4 A (A being the wavelength of the desired beam 104). The pitch for the antennas in the antenna pattern 420 may also be variable. The antenna pattern 420 may have a resolution of 0.0625, and a number of bits in the fractional representation of the antenna positions of the antenna pattern 420 can be 4. The pitch for the antennas in the antenna pattern 410 may be variable. However, the calculation of the phase shift parameter 122 may not be affected by the variable pitch because any adjusted antenna position may be used in the calculation. [0036] Fig. 5 illustrates a flow diagram relating to distributed calculation of beamforming parameters for phased arrays in one embodiment. The process 500 in Fig. 5 may be implemented using, for example, computer system 100 discussed above. An example process may include one or more operations, actions, or functions as illustrated by one or more of blocks 502, 504, 506, and/or 508. Although illustrated as discrete blocks, various blocks may be divided into additional blocks, combined into fewer blocks, eliminated, performed in different order, or performed in parallel, depending on the desired implementation.

[0037] The process 500 may begin at block 502, where a first circuit in a system may convert a desired beam direction of a desired beam into at least one phase slope parameter. The phased array may include a plurality of antennas connected to a plurality of front-end circuits of a beam forming circuit, and each antenna may be connected to a respective front-end circuit. In an example, the first circuit may convert the desired beam direction into a first phase slope parameter based on a beam angle of the desired beam, a wavelength of the desired beam, and a minimum unit spacing between the plurality of antennas in a first direction of a two-dimensional plane. The first circuit may further convert the desired beam direction into a second phase slope parameter based on the beam angle of the desired beam, the wavelength of the desired beam, and spacing between the plurality of antennas in a second direction of the two-dimensional plane.

[0038] The process 500 may proceed from block 502 to block 504. Block 504 may include blocks 506 and 508, where blocks 506 and 508 are performed for each antenna among the plurality of antennas. At block 506, a second circuit may determine a phase shift parameter of the antenna based on the at least one phase slope parameter and a physical location of the antenna. The process 500 may proceed from block 506 to block 508. At block 508, the second circuit may map the determined phase shift parameter of the antenna to control settings for a front-end circuit connected to the antenna. In an example, the second circuit may use a mapping table that stores different values of phase control parameters for the plurality of front-end circuits to map the phase shift parameter of the antennas to the control settings. A combination of phase control parameters from the mapping table may be used for configuring the plurality of front-end circuits to cause the phased array to form the desired beam having the desired beam direction. In an example, the mapping table may be stored in a memory device connected to the plurality of front-end circuits. In an example, a number of entries in the mapping table may be less than a number of possible beam directions of beams being formed by the phased array. In an example, a latch or memory register coupled to each front-end is used to store the front-end control settings determined by the mapper.

[0039] In another example, the second circuit may use a plurality of mapping tables that store different values of phase control parameters for the plurality of front-end circuits to map the phase shift parameter of the antennas to the control settings. A combination of phase control parameters from the plurality of mapping tables may be used for configuring the plurality of front-end circuits to cause the phased array to form the desired beam having the desired beam direction, where each phase control parameter among the combination of phase control parameters may be from a corresponding mapping table. In an example, the plurality of mapping tables may be stored in a plurality of memory devices connected to the plurality of front-end circuits. In an example, a number of entries in each mapping table among the plurality of mapping tables may be less than a number of possible beam directions of beams being formed by the phased array.

[0040] The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be implemented substantially concurrently, or the blocks may sometimes be implemented in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.

[0041] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

[0042] The corresponding structures, materials, acts, and equivalents of all means or step plus function elements, if any, in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope of the invention. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.