Title:
DISTRIBUTED CONTROL SYNCHRONIZED RING NETWORK ARCHITECTURE
Document Type and Number:
WIPO Patent Application WO/2018/098084
Kind Code:
A3
Abstract:
A ring network architecture includes multiple communication nodes configured in a ring. Wave pipelining is used to provide for high bandwidth and low latency on-chip communications. Each node implements a source-synchronized clocking scheme, such that there is no need to build an extensive low skew clock-tree across a large die area. A single reference clock signal is generated within a root node, and is routed through each of the nodes of the ring network in a unidirectional manner. Each node includes a timestamp counter and a color bit register, which store values that enable the node to resolve ordered transaction messages issued by the other nodes in a precise order, even though the nodes are operating independently, and receive the various transaction messages in totally different timing orders. Because the control logic is distributed among the nodes, no centralized controller is necessary.
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Inventors:
TAM KIT S (US)
Application Number:
PCT/US2017/062627
Publication Date:
December 05, 2019
Filing Date:
November 20, 2017
Export Citation:
Assignee:
DEGIRUM CORP (US)
International Classes:
H04J3/02; H04L12/02; H04L12/20
Foreign References:
| US20140079393A1 | 2014-03-20 | |||
| US20130279525A1 | 2013-10-24 | |||
| US20080140891A1 | 2008-06-12 | |||
| US20080025344A1 | 2008-01-31 | |||
| US20070237153A1 | 2007-10-11 | |||
| US20060098682A1 | 2006-05-11 | |||
| US5815016A | 1998-09-29 | |||
| US20030096577A1 | 2003-05-22 |
Other References:
See also references of EP 3545653A4
Attorney, Agent or Firm:
BEVER, HOFFMAN AND HARMS, LLP (US)
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