Technical Field The present invention relates circuits requiring a timing or clock circuit

Background Art In many digital computer circuits, a clock or oscillator component is necessary for the microprocessors and other components that require timing in the circuit

In order for components to function correctly, they must be driven by an oscillator with a stable frequency, l e with pulses having essentially the same time between them The oscillator is usually a simple crystal oscillator set to the appropπate frequency for the oscillator This system is used for its simplicity and because a crystal oscillator produces a consistent controlled frequency timing signal which is required by the microprocessor However, unfortunate side effect ot the crystal oscillator is its generation of a radio frequency signal on the oscillator frequency and on its harmonic frequencies These signals can interfere with radio receiving equipment This problem is aggravated by the fact that the energy of the clock pulses are highly concentrated around the clock and harmonic frequencies Therefore, given the bandwidth of most radio equipment a radio receiver tuned at or near the clock or harmonic frequency will intercept the full power of the spurious clock signal at that frequency and any transmission that is intended to be received by the receiver may be interfered with or blocked out In addition, the squelch circuits of most FM receivers will interpret the intercepted carπer and the squelch may open, stopping any frequency channel scanning and/or causing a distraction, thus necessitating "tightening" of the squelch, making the radio less responsive to weaker signals

While this problem can frequently be solved by metal shielding and appropriate placement of the computer and receiving circuits, there are circumstances where the amount of shielding required would be impractical One such instance is for police surveillance and data recording devices that are based upon digital computer circuits In law enforcement, interference with police radio reception is not a mere annoyance, but can be life threatening in emergency conditions Furthermore, owing to extremely high sensitivity of modern police radios, coupled with the fact that the patrol vehicle may be located in a place where signals are extremely weak, and thus more susceptible to interference, it is often impractical to adequately isolate the clock signals from the

radio through shielding and equipment placement This is because both systems are usually installed near each other in a patrol vehicle, and the newer data recording systems being introduced can be designed to partially control and record signals from the police radio An example ot such a device is disclosed in United States Patent Application, entitled " EVIDENCE-GATHERING LAW ENFORCEMENT VIDEO AND DATA DOCUMENTATION SYSTEM AND METHODS " , filed April 8, 1996, by Randall V Adams, Clinton Charles Turner, Michael Terry Dale, Steven E Bash, and Randell Perry Lawrence, which is incoφorated herein by reference This system has several microprocessors, such as the main central processor unit, driven by a oscillators In addition, input/output circuits are built around UART processors driven by oscillators In an embodiment of this system, the central processing unit is driven by a crystal oscillator producing a frequency of 11 059 MHz and the UARTS by oscillators or 3 68 MHz The harmonics of these frequencies extend into the police radio frequencies through the 150 MHz range A police radio interprets these signals as carπer waves, which can potentially block the reception of a regular transmission

In order to solve this problem, a system must be developed that will not interfere with radio frequencies where shielding, equipment placement, and like measures are inadequate or cannot be used Disclosure of Invention

In brief summary , the present invention overcomes or substantially alleviates the aforesaid problems of prior digital circuit systems In the present system a clock signal is generated where the frequency of the clock pulse is not concentrated as a shaφ peak around the clock frequency Rather, it is a dithered signal spread out over a range of frequencies so that a ladio receiver tuned at or near the clock or harmonic frequency will intercept only a fraction of the energy of the pulse since the pulse is spread over frequencies broader than the bandwidth of the radio The total energy of a clock or harmonic pulse is not changed, but since it is spread over a much wider range of frequencies a radio receiver will intercept only a fraction of the signal that would be intercepted from an undithered pulse

For the harmonic signals, where interference is usually more of a problem, the spread is even greater such that adjacent harmonic pulses or spikes spread into one another with little or no perceivable frequency peaks The overall energy level of

undithered and dithered peaks are the same, but the dithered peaks are flattened and the spread of frequency is random from modulation by the random white noise This effect is essentially the same as an increase in background noise Since most FM-squelch circuits in receivers use the presence or absence of noise to distinguish a carπer, if the receiver intercepts noise produced by the dithered harmonic peaks it will not be inteφreted as a carrier Therefore, the squelch will not open upon reception of this signal

In summary, the present invention is a circuit that produces a modified or dithered clock signal that differs from regular crystal oscillator clock signals It differs by (1) the reduction in the quality of the signal that can be intercepted by a receiver and (2) a change in the quality of the signal to resemble background noise, rather than a carrier The combination of both of these effects tor dithered clock pulses has been found to mateπalh reduce the interference to communications as compared to undithered clock pulses Therefore, an object of the present invention is to provide a system producing a dithered clock signal that does not materially interfere with radio equipment

Another object of the present invention is to provide a system that produces a clock signal that is suitable for microprocessor circuits, but does not have the potential of the clock signals of prior art systems for radio interference

Brief Description of Drawings Figure 1 is a graph ot a clock signal produced by an ordinary digital crystal oscillator of time vs voltage,

Figures 2 through 6 show various spectrum analysis plot ot various clock signals The analyzer resolution bandwidth is 30 Khz in all cases, which is a reasonable approximation of the bandwidth of typical narrow band FM receivers such as those used in police vehicles.

Figure 2 is a spectrum analysis graph ol frequency vs signal strength of a clock pulse as in Figure 1 , Figure 3 is a spectrum analysis graph of frequency vs signal strength of some of the harmonic signals of the clock pulse illustrated in Figures 1 and 2;

Figure 4 is a spectrum analysis graph of frequency \ s signal strength of a dithered clock pulse according to the invention.

Figure 5 is a spectrum analysis graph ol fiequency vs signal strength of some of the harmonic signals ol the dithered clock pulse illustrated in Figure 4.

Figure 6 is a spectrum analysis graph of frequency vs signal strength showing the background noise in the absence any of the clock pulses in Figures 3 and 5,

Figure 7 is a block diagram showing the relation of Figures 7A and 7B which collectively depict a cncuit diagram embodying the invention, and Figures 8 A and 8B aie circuit diagrams showing an application for the circuit of Figure 7

Best Mode for Carrying Out the Invention Referring to Figure 1 , crystal oscillators designed to produce clock signals generally generate a signal resembling the signal represented in Figure 1. Figure 1 shows a square wave signal having voltage v. time. The signal is a 3.68 MHz wave comprising voltage pulses that are 272 nanoseconds apart.

Figure 2, is a spectrum analysis of the signal of Figure 1 centered at 10 MHz and spanning 20 MHz. Figure 2 shows a shaφ peak at 3.68 MHz, harmonic peaks fundamental frequency 3.68 MHz, harmonic peaks at 7.35, 11.03, 14.7, and 18.3 MHz. Figure 3 is also a spectrum analysis centered at 151.13 MHz spanning 50 MHz. Several frequency signals the bulk of which are harmonic signals of the signal illustrated in Figures 1 and 2. This is within a frequency range used by police radio equipment.

Referring, particularly to the tall harmonic peaks near the middle of the graph in the 151 MHz frequency range, many of which are at or sufficiently near the assigned frequency of certain police radios, such that essentially all of this peak falls within the bandwidth of the receiver. Since essentially all of the signal is intercepted by the receiver, it effectively acts as a carrier wave that can block any other weaker signal in the bandwidth which may be a communication from another police transmitter. The interference of the harmonic peak, therefore, essentially renders this frequency unusable for communication where it is impractical to adequately shield all circuits utilizing the clock frequency that may be generating the spurious signals from the police radio reception equipment.

Figure 4 illustrates a dithered clock pulse of the invention, i.e. showing a signal analysis as in Figure 2, but with the clock signal modified by the dithering circuit. A comparison of Figure 4 with Figure 2 shows that the dithered signal still has the clock signal peak and the harmonics, but the peaks are lower and much broader. In the higher frequency harmonic signals, the broadening becomes more pronounced. This is because the extent of broadening from the modulation increases with the frequency. This is particularly the case in the higher harmonics as shown in Figure 5. Figure 5 is a signal analysis chart as in Figure 3, but with the clock signal modified by the dithering circuit. A comparison of Figure 5 with Figure 3 shows that the harmonic peaks have become flattened so that they merge into one another resulting in a slightly undulating signal with no prominent peaks over white noise. The energy from the

dithered harmonic signals in Figure 5 are the same as in Figure 3, but in Figure 5 the dithered signal peaks have become flattened and overlapping so that are essentially the same as elevated background noise Note that the signal level for the noted frequency as indicated by the marker is reduced by approximately 22 decibels This represents an amount of signal that is less than one one-hundredth of that of an undithered clock in the same bandwidth

Referring to Figure 6. which is a spectrum analysis centered at 151 13 MHz spanning 50 MHz as in Figures 3 and 5, but showing only the background noise with no oscillator generating a signal The backgiound is essentially a flat white noise spectrum A comparison of Figures 5 and 6 shows that Figure 5 is similar to Figure 6, l e it resembles background radiation in that it is almost a flat randomized white noise signal However the energy level is elevated above the background and there are slight undulations in the overall signal strength

Referring to Figuies 7A and 7B, which collectively comprise a circuit diagram that embodies the invention, a noise generator circuit 101 is built around zener diode

Zl and transistor Q2 This circuit generates randomized white noise over several MHz Resistors R5 and R4 scale the output signal of noise generator 101 for input to Ul , which is a phase lock loop (PLL) oscillator A crystal oscillator 103 around crystal CR1 and transistor Q l produces a signal at 1 1 059 MHz which provides an input to the PLL oscillator The PLL oscillator modulates the 1 1 059 MHz signal with the signal from the white noise generatoi 103 to produce a frequency modulated or dithered clock signal as illustrated in Figures 3 and 4

Integrated circuit U2 takes the 11 059 MHz output from the oscillator Ul and produces a signal 1 1 059 divided by three, yielding 3 68 MHz Integrated circuit U3 is a power supply legulator that regulates a 12 volt input to 5 volts

An object of this circuit is to produce a clock signal and dither the clock signal with white noise Since the crystal oscillator circuit 103 by its nature, cannot be dithered to any great extent, the PLL oscillator is used to create a modulated clock signal. The crystal oscillator 103 now functions to give the circuit a long-term stability on the 11 059 MHz frequency However, because of the dithering, clock pulses from one to the next will vary in timing A time v signal strength oscilloscope read-out of the dithered signal will appear very similar to the undithered signal illustrated in Figure 1 , but will show slight movement or blurring at the edges of the pulses The

significant difference between the dithered and undithered signal is not the signal strength, as illustrated in Figure 1 for the undithered signal, but the frequency analysis of the signal as illustrated in the comparative frequency spectrum anah sis graphs in Figures 2 to 5 which were produced by the circuit in Figures 7A and 7B It is understood that circuits, other than that illustrated in Figures 7A and 7B, are contemplated as long as they function as recited and claimed herein The signal is dithered oi modulated sufficiently to spread the energy of the signal or a harmonic signal over a wide enough fiequency range so that a receiver will onh intercept a fraction of the energ> Since the frequency of the clock signal is modulated using random white noise, the effect is to spread the signal randomly over a wide-frequency range in a manner that resembles an increase in background noise The signal is not concentrated in any one frequency which would be inteφreted by a radio receiver as a carrier and would possibly blank out a transmitted signal The extent ot dithering by the modulation can be determined in any particulai application to suitably eliminate or reduce radio interference

The timing of the signal is varied somewhat by the dithering, but the amount of variance is insufficient to affect the operation of the digital cncuits usmg the clock signal For example a typical application of the invention for a clock signal around 11 MHz comprises dithei in the amount of about 2 nanoseconds or about 2 percent This is sufficiently small to avoid effecting microprocessors or most UART circuits for serial communication This is due to the fact that over several clock pulses the average variance is essentially the same as a crystal oscillator circuit and the variance between individual pulses is within the operating parameters of most digital circuits

Reference is now made to Figures 8A and 8B which show a specific application of the invention Shown in Figure 8A is a portion of a UART processor (SCN2681) with a crystal oscillator X3 attached to pins 32 and 33 In Figure 8B is the circuit as modified to remove the ciystal oscillator X3 and attach the TP3, 3 68 MHz. output in Figures 7A and 7B to pm 33 Other circuits requiring a clock signal can be similarly modified The circuit in Figures 7A and 7B is designed to provide a 3 68 MHz clock signal for UART circuits through TP2 and a 11 059 clock signal for microprocessors and the like through TP3

Although the illustrated embodiment involves dithering a signal from a crystal oscillator, the invention can be applied to other oscillator types such as, but not limited to, L/C and R/C oscillators.

The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. What is claimed and desired to be secured by Letters Patent is: