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Title:
DOMAIN WALL-UTILIZING SPIN MOSFET AND DOMAIN WALL-UTILIZING ANALOG MEMORY
Document Type and Number:
WIPO Patent Application WO/2017/183574
Kind Code:
A1
Abstract:
This domain wall-utilizing spin MOSFET (100) is provided with: a domain wall drive layer (1) comprising a domain wall (DW), a first region (1a), a second region (1b), and a third region (1c) positioned between the first region and the second region; a channel layer (5); a magnetization free layer (6) provided on a first end (5aA) on a first surface of the channel layer and arranged so as to contact the third region of the domain wall drive layer; a magnetization fixed layer (7) disposed on the second end (5aB) opposite of the first end; and, disposed between the first end and the second end of the channel layer, a gate electrode (8) provided on the channel layer with a gate insulating layer (9) interposed therebetween.

Inventors:
SASAKI TOMOYUKI (JP)
Application Number:
PCT/JP2017/015264
Publication Date:
October 26, 2017
Filing Date:
April 14, 2017
Export Citation:
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Assignee:
TDK CORP (JP)
International Classes:
H01L29/82; G06N3/06; H01L21/8239; H01L27/105; H01L43/08
Domestic Patent References:
WO2014188525A12014-11-27
WO2013047213A12013-04-04
WO2010087269A12010-08-05
Foreign References:
JP2007273495A2007-10-18
US20120068279A12012-03-22
US20100148288A12010-06-17
Other References:
MRIGANK SHARAD ET AL.: "Spin-Based Neuron Model With Domain-Wall Magnets as Synapse", IEEE TRANSACTIONS ON NANOTECHNOLOGY, vol. 11, no. 4, July 2012 (2012-07-01), pages 843 - 853, XP011454852, DOI: doi:10.1109/TNANO.2012.2202125
Attorney, Agent or Firm:
TANAI Sumio et al. (JP)
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