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Patent Searching and Data


Title:
DOUBLE-SIDED WAFER POLISHING METHOD
Document Type and Number:
WIPO Patent Application WO/2018/020798
Kind Code:
A1
Abstract:
The present invention limits roll-off of the outer edge of wafers in double-sided polishing and reduces variation in flatness. Provided is a method for double-sided wafer polishing in which the wafers, which have been set inside the wafer-loading hole of carriers, are compressed and held along with the carriers with an upper surface plate and a lower surface plate and the upper surface plate and the lower surface plate are rotated while supplying a slurry to the wafers. The method is provided with: a step (S1) for measuring beforehand the slope of the main surfaces of multiple carriers near the edges of the wafer-loading holes; steps (S2Y, S3) for selecting, from among the multiple carriers, those for which the slope is not more than a threshold value on the basis of the slope measurement results; and a step (S4) for double-sided wafer polishing using the selected carriers.

Inventors:
MIKURIYA Shunsuke (2-1 Shibaura 1-chom, Minato-ku Tokyo 34, 〒1058634, JP)
MIURA Tomonori (2-1 Shibaura 1-chom, Minato-ku Tokyo 34, 〒1058634, JP)
Application Number:
JP2017/019129
Publication Date:
February 01, 2018
Filing Date:
May 23, 2017
Export Citation:
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Assignee:
SUMCO CORPORATION (2-1 Shibaura 1-chome, Minato-ku Tokyo, 34, 〒1058634, JP)
International Classes:
B24B37/28; H01L21/304
Attorney, Agent or Firm:
WASHIZU Mitsuhiro et al. (Daisan-Taiyo Bldg. 7th Floor, 5-1 Ginza 1-Chom, Chuo-Ku Tokyo 61, 〒1040061, JP)
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