Title:
DOUBLE-SIDED WAFER POLISHING METHOD AND DOUBLE-SIDED POLISHING APPARATUS
Document Type and Number:
WIPO Patent Application WO/2018/193758
Kind Code:
A1
Abstract:
The present invention provides a double-sided wafer polishing method for placing multiple double-sided polishing carriers in a double-sided polishing apparatus and performing double-sided polishing of wafers, wherein, when readying a carrier set comprising multiple double-sided polishing carriers to be disposed between upper and lower surface plates: the amount of waviness, calculated from data measuring the shape of the double-sided polishing carrier using a shape measuring machine, is acquired for all of the multiple double-sided polishing carriers of the carrier set; a carrier set for which the difference between the maximum value and minimum value for the amounts of waviness among the multiple double-sided polishing carriers in the carrier set is not more than a fixed value is selected and readied; and the carrier set is placed in the double-sided polishing apparatus and double-sided polishing of wafers is performed. Provided thereby are a double-sided wafer polishing method and a double-sided polishing apparatus with which differences (variations) in flatness can be limited among the wafers obtained by double-polishing using the multiple double-sided polishing carriers.
Inventors:
TANAKA YUKI (JP)
KITAZUME DAICHI (JP)
KITAZUME DAICHI (JP)
Application Number:
PCT/JP2018/009962
Publication Date:
October 25, 2018
Filing Date:
March 14, 2018
Export Citation:
Assignee:
SHINETSU HANDOTAI KK (JP)
International Classes:
B24B37/28; B24B49/12; H01L21/304
Foreign References:
JP2004148497A | 2004-05-27 | |||
JP2015174168A | 2015-10-05 | |||
JP2014176954A | 2014-09-25 | |||
JP2011143477A | 2011-07-28 | |||
JP2004303280A | 2004-10-28 | |||
JP2013132744A | 2013-07-08 | |||
JP2010023217A | 2010-02-04 | |||
JP2009190125A | 2009-08-27 | |||
JP2016124053A | 2016-07-11 | |||
JP2015208840A | 2015-11-24 |
Attorney, Agent or Firm:
YOSHIMIYA Mikio et al. (JP)
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