Title:
DRIVE METHOD FOR MEMORY ELEMENT, AND STORAGE DEVICE USING MEMORY ELEMENT
Document Type and Number:
WIPO Patent Application WO/2012/026506
Kind Code:
A1
Abstract:
In a drive method that enables more stable switching operations, a memory element (10) is equipped with an insulating substrate (1) provided with a first electrode (2), a second electrode (3), and an electrode gap portion (4) for generating a resistance change phenomenon between the first electrode and the second electrode. By applying to the memory element a first voltage pulse from a pulse generation source for shifting the memory element from a predetermined low resistance status to a predetermined high resistance status, and a second voltage pulse for shifting from the high resistance status to the low resistance status via a serially connected resistor, the current flowing to the memory element after the change to the low resistance value is reduced. The drive method is characterised in that the voltage pulse is applied so that the electrical resistance between the memory elements from the pulse generation source is higher when shifting from the high resistance status to the low resistance status, than when shifting from the low resistance status to the high resistance status.
Inventors:
TAKAHASHI TSUYOSHI (JP)
MASUDA YUICHIRO (JP)
FURUTA SHIGEO (JP)
SUMIYA TOURU (JP)
ONO MASATOSHI (JP)
HAYASHI YUTAKA (JP)
FUKUOKA TOSHIMI (JP)
SHIMIZU TETSUO (JP)
SOMU KUMARAGURUBARAN (JP)
SUGA HIROSHI (JP)
NAITOU YASUHISA (JP)
MASUDA YUICHIRO (JP)
FURUTA SHIGEO (JP)
SUMIYA TOURU (JP)
ONO MASATOSHI (JP)
HAYASHI YUTAKA (JP)
FUKUOKA TOSHIMI (JP)
SHIMIZU TETSUO (JP)
SOMU KUMARAGURUBARAN (JP)
SUGA HIROSHI (JP)
NAITOU YASUHISA (JP)
Application Number:
PCT/JP2011/069113
Publication Date:
March 01, 2012
Filing Date:
August 25, 2011
Export Citation:
Assignee:
NAT INST OF ADVANCED IND SCIEN (JP)
FUNAI EAA TECH RES INST INC (JP)
FUNAI ELECTRIC CO (JP)
TAKAHASHI TSUYOSHI (JP)
MASUDA YUICHIRO (JP)
FURUTA SHIGEO (JP)
SUMIYA TOURU (JP)
ONO MASATOSHI (JP)
HAYASHI YUTAKA (JP)
FUKUOKA TOSHIMI (JP)
SHIMIZU TETSUO (JP)
SOMU KUMARAGURUBARAN (JP)
SUGA HIROSHI (JP)
NAITOU YASUHISA (JP)
FUNAI EAA TECH RES INST INC (JP)
FUNAI ELECTRIC CO (JP)
TAKAHASHI TSUYOSHI (JP)
MASUDA YUICHIRO (JP)
FURUTA SHIGEO (JP)
SUMIYA TOURU (JP)
ONO MASATOSHI (JP)
HAYASHI YUTAKA (JP)
FUKUOKA TOSHIMI (JP)
SHIMIZU TETSUO (JP)
SOMU KUMARAGURUBARAN (JP)
SUGA HIROSHI (JP)
NAITOU YASUHISA (JP)
International Classes:
G11C13/00; H01L27/105; H01L45/00; H01L49/02
Domestic Patent References:
| WO2006137111A1 | 2006-12-28 | |||
| WO2009034687A1 | 2009-03-19 |
Foreign References:
| JP2007123828A | 2007-05-17 | |||
| JP2009205709A | 2009-09-10 |
Attorney, Agent or Firm:
ARAFUNE, Hiroshi et al. (JP)
Hiroshi Arafune (JP)
Hiroshi Arafune (JP)
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Claims: