Title:
DYNAMIC RANDOM ACCESS MEMORY FOR THREE-LEVEL UNIT, AND METHOD FOR READING SAME
Document Type and Number:
WIPO Patent Application WO/2017/036293
Kind Code:
A1
Abstract:
A dynamic random access memory for a three-level unit, and a method for reading same. The dynamic random access memory (DRAM) for a three-level unit stores three voltage levels (0, VDD/2, VDD) on a plurality of storage units. A selected storage unit is connected to a bit line (BLT) to produce a signal voltage, and a reference bit line (BLR) adjacent thereto produces a VDD/2 reference voltage. An asymmetric sense amplifier (ASA) is used to judge whether a signal voltage is the same as or different from the reference voltage, and the amplifier has a positive offset voltage and a negative offset voltage. Control signals A and B for the ASA are switched at different time points, or are switched at different voltage levels or a combination of both, so as to set the offset voltage to be in a positive or a negative polarity. Data in the storage unit can be read to the local IO by reading twice from the same ASA continuously or reading once from two ASAs. An output of the ASA will be used for recovering a voltage to the storage unit accessed.
Inventors:
LIU BO (US)
Application Number:
PCT/CN2016/094693
Publication Date:
March 09, 2017
Filing Date:
August 11, 2016
Export Citation:
Assignee:
SHENZHEN XINGMEM TECH CORP (CN)
International Classes:
G11C7/06
Foreign References:
| CN101770802A | 2010-07-07 | |||
| CN103745742A | 2014-04-23 | |||
| US5949256A | 1999-09-07 | |||
| US20060034130A1 | 2006-02-16 |
Attorney, Agent or Firm:
CHOFN INTELLECTUAL PROPERTY (CN)
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