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Patent Searching and Data


Title:
ECONOMIC AND DURABLE BALLAST CIRCUIT ARRANGEMENT WITH LOW HARMONICS
Document Type and Number:
WIPO Patent Application WO/2010/055528
Kind Code:
A3
Abstract:
The present invention relates to an electronic Ballast circuit arrangement with High Power Factor, High Efficiency, Low Harmonics, Low Lamp Current Crest Factor and Low Electromagnetic Interference (EMI)/ Radio frequency interference (RFI), to operate discharge lamps including fluorescent lamps, but not limited there to. The invention of the electronic ballast circuit has brought about THD not only less than 10 %, but even less than 5 %, Power Factor > 0.98, Lamp Current Crest Factor < 1.7, EMI/RFI within permissible limits of EN 55015, durability of the circuit against abnormal conditions like end of tube life, neutral fault and high Mains voltages, improvement in efficiency and all this at an affordable cost.

Inventors:
BAKERI KARTIK PRAFULL (IN)
Application Number:
PCT/IN2009/000189
Publication Date:
November 25, 2010
Filing Date:
March 23, 2009
Export Citation:
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Assignee:
BAKERI KARTIK PRAFULL (IN)
International Classes:
H05B41/233
Domestic Patent References:
WO1999014992A11999-03-25
Foreign References:
US6292339B12001-09-18
JPH0224997A1990-01-26
GB1511757A1978-05-24
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