Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
ELECTRICAL CIRCUIT UTILIZING AVALANCHE TRANSISTOR FOR GENERATING AND TRANSMITTING SINE-WAVE ENERGY PULSES
Document Type and Number:
WIPO Patent Application WO/1996/015590
Kind Code:
A1
Abstract:
A method and apparatus are shown for generating and transmitting very short and widely separated high frequency sine-wave pulses of electromagnetic energy into space. A transistor (TR3), a charging capacitor (C8), and an inductor (L1) are coupled into a first series loop path to form a discharge circuit. A bias voltage source (52), the same charging capacitor (C8), and a charging resistor (R13) are coupled into a second series loop path to form a recharging circuit. The bias voltage source is selected to be capable of biasing the forward conduction path of the transistor near its breakdown condition. The transistor is intermittently triggered into its breakdown or avalanche mode, and an antenna (56) is coupled to the inductor (L1) for transmitting the energy pulses.

More Like This:
JPH01122204REENTRANT RESONATOR
Inventors:
MORGAN HARRY CLARK (US)
BOYD WILLIAM HARSHA (US)
Application Number:
PCT/US1995/014683
Publication Date:
May 23, 1996
Filing Date:
November 13, 1995
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MORGAN HARRY CLARK (US)
BOYD WILLIAM HARSHA (US)
International Classes:
H03K7/04; H03K9/04; H03K11/00; H04B1/24; H04B1/04; (IPC1-7): H03K7/04; H03K7/06; H03K9/04; H03K9/06
Foreign References:
US3898589A1975-08-05
US3271689A1966-09-06
US3274497A1966-09-20
Download PDF:
Claims:
1. An electrical circuit utilizing a transistor in the avalanche mode for generating and transmitting very short and widely separated high frequency sine wave pulses of electrical energy, comprising: a discharge circuit including a charging capacitor and an inductor connected in a first series loop path with two electrodes of the transistor that are part of a forward conduction path; a triggering circuit including a coupling capacitor connected to the other electrode of the transistor to provide an input for triggering it into its breakdown or avalanche mode; antenna means coupled to said inductor for transmitting electromagnetic energy into space; a recharging circuit including a charging resistor and a bias voltage source coupled with said charging capacitor into a second series loop path, said bias voltage source being capable of biasing the forward conduction path of the transistor near its breakdown condition; and the time constant of said recharging circuit being at least many times greater than the time constant of said discharge circuit, so that when current is being discharged from said capacitor into said inductor through said forward conduction path of said transistor the avalanche mode current carriers will recombine concurrently with or soon after the generation of the RF cycle or cycles, and then end the low resistance avalanche mode. >.
2. An electrical circuit as in Claim 1 wherein said charging resistor is selected of sufficiently large value to permit the recharging of said charging capacitor at such a slow rate that the avalanche current discharged through said transistor in response to each pulse is essentially limited to the charge previously stored on said charging capacitor.
3. An electrical circuit as in Claim 1 wherein the capacity of said charging capacitor, the maximum voltage applied to it, and the time interval between successive triggering pulses, are so selected as to avoid destruction of said transistor.
4. An electrical circuit as claimed in Claim 1 wherein said transistor is of the NPN type having a base, a collector, and emitter, and a forward conduction path extending from its collector to one of said base and emitter; one terminal of said bias voltage source is connected to said collector; and one terminal of said charging capacitor is also connected to said collector.
5. An electrical circuit as claimed in Claim 4 wherein said forward conduction path is the collector emitter path.
6. An electrical circuit as claimed in Claim 4 wherein said forward conduction path is the collector base path.
7. The circuit of Claim 1 which includes a delay line forming said capacitor.
8. An electrical circuit as in Claim 7 wherein the length of said delay line forming said capacitor corresponds to about a quarter cycle at a desired signal transmission frequency.
9. An electrical circuit as in Claim 7 wherein said delay line is a coaxial cable, whose discharge time due to its length is onequarter cycle of the desired signal transmission frequency.
10. An electrical circuit as in Claim 2 wherein said inductor produces essentially a single sine wave cycle of voltage representing an oscillation frequency determined essentially by the ratio of the inductance of said inductor to the resistance of said forward conduction path of said transistor during breakdown.
11. An electrical circuit as in Claim 5 wherein said coupling capacitor is connected to the base of said transistor, and which further includes a bias resistor having one end connected to the base of said transistor, said inductor being connected between the other end of said bias resistor and the emitter of said transistor.
12. An electrical circuit as in Claim 11 which further includes an additional capacitor in parallel with said inductor.
13. An electrical circuit as in Claim 6 wherein said coupling capacitor is connected to the emitter of said transistor, said first series loop further includes a load resistor connected between said inductor and said charging capacitor, and which further includes a bias resistor connected between the emitter of said transistor and said load resistor.
14. An electrical circuit as in Claim 13 wherein said antenna means is connected to the juncture between said inductor and said load resistor.
15. An electrical circuit for generating and transmitting very short and widely separated high frequency sinewave pulses of electrical energy, comprising: a transistor of the NPN type having a base, a collector, and emitter, and a forward conduction path extending from its collector to its emitter; a discharge circuit including a delay line and an inductor connected in a first series loop with said forward conduction path of said transistor, said inductor being connected to said emitter; a triggering circuit including a coupling capacitor connected to said base of said transistor to provide an input for triggering it into its breakdown or avalanche mode; an antenna connected in parallel with said inductor for transmitting electromagnetic energy into space; a recharging circuit including a charging resistor and a bias voltage source coupled with said delay line into a second series loop, said bias voltage source being capable of biasing the forward conduction path of the transistor near its breakdown condition; and the time constant of said recharging circuit being at least many times greater than the time constant of said discharge circuit, so that when current is being discharged from said delay line into said inductor through said forward conduction path of said transistor the avalanche mode current carriers will recombine and end the low resistance avalanche mode upon exhaustion of the charge stored in the charge line.
16. An electrical circuit utilizing a transistor in the avalanche mode for generating and transmitting very short and widely separated high frequency sine wave pulses of electrical energy, comprising: a discharge circuit including a charging capacitor and an inductor connected in a first series loop, with two electrodes of the transistor forming its forward conduction path; a triggering circuit including a coupling capacitor connected to the other electrode of the transistor to provide an input for triggering it into its breakdown or avalanche mode, antenna means coupled to said inductor for transmitting electromagnetic energy into space; a recharging circuit including a bias voltage source coupled with said charging capacitor into a second series loop, said bias voltage source being capable of biasing the forward conduction path of the transistor near its breakdown condition; and said recharging circuit being inoperable for recharging said charging capacitor at least until sufficient current has been discharged from said capacitor into said inductor through said forward conduction path of said transistor to cause the avalanche mode current carriers to recombine so as to end the low resistance avalanche mode.
17. The method of generating and transmitting very short and widely separated high frequency sine wave pulses of electrical energy, comprising: coupling a transistor, a charging capacitor, and a load device into a first series loop path forming a discharge circuit; coupling a bias voltage source and the same charging capacitor into a second series loop path forming a recharging circuit with a large RC time constant compared to the first series loop path, the bias voltage source being selected to be capable of biasing the forward conduction path of the transistor near its breakdown condition; intermittently triggering the transistor into its breakdown or avalanche mode; coupling an antenna means to the load device for transmitting electromagnetic energy pulses into space; sampling an original information signal upon each occurrence of a periodic reference signal; and in response to the signal samples, modifying the starting times of successive transmitted pulses in accordance with a pulse position modulation protocol .
18. The method of Claim 17 wherein the load device is an inductor.
Description:
ELECTRICAL CIRCUIT UTILIZING AVALANCHE TRANSISTOR FOR GENERATING AND TRANSMITTING SINE-WAVE ENERGY PULSES

BACKGROUND OF THE INVENTION In many applications it is helpful to be able to transmit short but widely separated pulses of electrical energy. Such applications may include timing or synchronizing systems, data or other intelligence transmission systems, and the like. The use of a transistor device operating in the avalanche or breakdown mode to generate positive energy pulses into resistive loads has been previously known.

SUMMARY OF THE INVENTION

According to the present invention an electrical circuit is provided for producing a series of widely separated pulses of electrical energy each of which is of extremely brief duration, consisting essentially of a single cycle of sine wave configuration at a known signal frequency. The resting time between the high- frequency pulses is at least many times the length of each individual pulse. In accordance with the present invention the preferred method of generating the energy pulses involves utilizing an avalanche transistor that is biased near its breakdown voltage. When a trigger pulse is applied to the transistor, the avalanche transistor breaks down and conducts a very heavy- current with a very rapid rise time. In accordance with the preferred form of the invention a discharge circuit includes the forward conduction path of the transistor coupled in a first series loop path with a delay line acting as a charging capacitor, and an inductor. An energy pulse passing through the avalanche transistor and the normally quiescent inductor produces an oscillation of very brief duration.

A charging circuit preferably includes a second series loop path in which a charging resistor is connected with both the charging capacitor and a bias voltage source. The bias voltage source is capable of biasing the forward conduction path of the transistor near its breakdown or avalanche condition.

A preferred circuit feature prevents rapid recharging of the capacitor, so that the charge cannot be immediately replaced. This can be accomplished by providing that the time constant of the second series loop circuit for charging the capacitor is at least many times as great as the time constant of the first series loop circuit, by which current is discharged from the same capacitor through the forward conduction path of the transistor. In this embodiment, a very long resting time is provided between input pulses, to permit the capacitor to recharge.

In accordance with the invention it is also preferred to utilize the generator and transmitter for transmitting analog information that is coded in accordance with a pulse position modulation protocol. The original information signal is sampled upon each occurrence of a periodic reference signal, and in response to those signal samples the starting times of successive transmitted pulses are modified in accordance with a PPM protocol.

SUMMARY OF THE DRAWINGS Fig. 1 is a schematic circuit diagram of the presently preferred form of a pulse generator circuit; Fig. 2 is a schematic circuit diagram of an alternate form of the pulse generator circuit;

Fig. 3 is a schematic circuit diagram of another alternate form of the pulse generator circuit;

Fig. 4 is a schematic diagram of still another alternate form of the invention; and

Fig. 5 is a further alternate form of the invention.

THE PULSE GENERATOR CIRCUITRY (Fig. 1) Fig. 1 illustrates the presently preferred form of an electrical circuit for generating intermittent high frequency pulses of extremely brief duration utilizing a transistor TR3 that is operated in the avalanche mode.

The pulse generating circuit includes a first series loop path for discharging a delay line C8 used as a charging capacitor; an input for applying triggering pulses to the transistor; means for coupling the output signal to a load; and a second series loop path for recharging the charging capacitor.

The transistor TR3 has a base, a collector, and an emitter, and has a forward conduction path extending from its collector to its emitter. The associated discharge circuit includes an inductor LI and the charging capacitor C8 connected in a first series loop circuit with the forward conduction path of the transistor. The coaxial delay line C8 acting as a charging capacitor is connected to the collector of the transistor while inductor LI is connected to its emitter.

A coupling capacitor C9 is connected to the base of TR3 to provide an input for triggering the transistor. A trigger input line 36 applies positive- going trigger pulses 40 through coupling capacitor C9 to the base of transistor TR3, for intermittently triggering the transistor with sharp positive pulses 37 into its breakdown condition.

An antenna 56 is coupled across the inductor LI, providing an output load for the circuit such that the internal impedance of the circuit remains inductive in nature. A second series loop circuit provides for recharging the charging capacitor. It includes a bias voltage source capable of biasing the forward conduction path of transistor TR3 near its breakdown condition. It also includes a charging resistor R15 connected in the second series loop circuit with both the bias voltage source and the charging capacitor C8.

The time constant of the second series loop circuit for charging the charging capacitor C8 is at least many times as great as the time constant of the first series loop circuit when in the discharge mode -- i.e., when current is being discharged from the charging capacitor through the forward conduction path of the transistor and through the inductor. This prevents any rapid recharging of capacitor C8, so that the charge on C8 cannot be immediately replaced.

The Bias Source and Charging Circuit Loop

The bias source 52 is provided by a transformer Tl that has its primary winding fed from the clock circuit through a resistor R13 and transistor TR2 to provide an alternating voltage from a voltage step-up transformer to a diode Dl that, in turn, maintains a fixed bias in the range of about +100 to +130 volts, for example, across a capacitor C7. This bias voltage is then available to bias the collector-emitter path of the avalanche transistor TR3 near its avalanche breakdown voltage.

The bias voltage of about +100 to +130 volts is applied from the bias source 52 through a large resistor R15 across the charging capacitor C8. The

bias source 52 and resistor R15 provide a charging circuit for supplying a charge to capacitor C8 so that the capacitor will hold a charge ready to be discharged through the avalanche transistor. The charging resistor R15 is connected between the bias voltage source 52 and the collector of transistor TR3, for biasing the transistor near its avalanche breakdown voltage as well as supplying a charge to the charging capacitor C8 that may be discharged through said avalanche transistor.

Alternatively, a voltage doubler may be used to quadruple the output power for the single RF (radio frequency) cycle. Any other power source can be used to obtain the 130 (or 260) DC power. In some instances the use of a battery power source may be more convenient .

Note that a transistor which can avalanche from under five volts to thousands of volts may be used. Reverse bias diodes can be operated in the avalanche mode, also, but transistors are more easily triggered.

The Charging Capacitor and the Discharge Circuit Loop

Since the bias voltage of about +100 to +130 volts is applied across the delay line or charging capacitor C8, the charging capacitor is then in a position to dump a large charge through the avalanche transistor whenever the proper bias conditions exist . An inductor LI comprising an inductive load is connected between the emitter of TR3 and ground. The collector of TR3, the charging capacitor C8, inductor LI, and the emitter of TR3, are connected in the first series loop circuit. Thus the charging capacitor C8 is coupled between the inductor and the collector of transistor TR3 to form a first series loop circuit with the collector-emitter conduction path of the transistor.

Transistor Bias and Triggering

A bias resistor R16 is connected between the base of TR3 and ground. Alternatively, this bias resistor may be connected between the base of the transistor and its emitter, at the other end of the inductor LI.

The triggering pulses 37 applied through coupling capacitor C9 to the base of transistor TR3 provide intermittent triggering of the transistor to produce an avalanche of current from the charging capacitor C8 through the transistor in response to each triggering pulse.

Relative Time Constants

It is important that the charging circuit is also adapted to re-charge the charging capacitor C8 at a sufficiently slow rate so that the total avalanche current discharged through the transistor is essentially limited to the charge previously stored on the charging capacitor. The capacity of the charging capacitor, the maximum voltage applied to the charging capacitor, and the time interval between successive triggering pulses, are such as to avoid destruction of said transistor. In other words, the avalanche current may have an instantaneous value of 0.1 ampere to several amperes, and that higher current flow if continuous would destroy the transistor. In the present circuit design, component values are selected such as to limit the average current to the maximum allowable for the transistor. One important feature of circuit design is the large time constant of the capacitor charging circuit, but no longer than the time period between PPM pulses.

Preferred Component Values for Standard Cordless Phone Operation

In the bias voltage circuit of Fig. 1 the preferred circuit values are as follows. R13 has the value 4.7k ohms. Transistor TR2 is of type 2N2222.

Diode Dl is type 1N3070. Capacitor C7 has the value of 0.01 microfarad.

For the operative portion of the circuit of Fig. 1 the preferred circuit values for standard cordless phone operation include a type 2N2222 transistor as TR3; capacity of 68 to over 120 picofarads for capacitor C8; resistance of 100k ohms for resistor R15; and a value of one-half micro-henries for the inductor LI. This results in a one cycle time of twenty nano- seconds or a repetition frequency of 50 MHz. Coupling capacitor C9 is preferably 10 to 100 picofarads and the transistor biasing resistor R16 is preferably 4.7k ohms .

Where a delay line is used as a charge storage device to provide the charging capacitor C8 in the transmitter driver, the length of the delay line is preferably selected to provide an output pulse whose period is about one-fourth the period of the single cycle wave to be generated. Thus, if the generated wave has a period of twenty nano-seconds, the length of the coaxial cable delay line should be approximately five nano-seconds .

The Triggering Operation When a triggering pulse 37 is applied to the base of transistor TR3 , the transistor immediately conducts in avalanche fashion, producing a large current flow. The result is that a large pulse of energy is applied to the inductor circuit.

The Generated Wave Forms

Voltage pulses received through coupling capacitor C9 and reaching the transistor base may have a maximum positive amplitude of about 5 volts and a time duration of about 20 nanoseconds or less. The collector voltage drops abruptly from its normal value of +100 or +130 to about + 8 volts, remaining at that level for the balance of an 0.3-microsecond period before returning back to its normal voltage in a rising path that requires about 20 microseconds. During the abrupt drop, the collector, in less than 20 nanoseconds, drops from its normal positive voltage to about a + 8 volt level, remaining essentially at that value for many nanoseconds before rising very much, although it does eventually rise back to its normal voltage. During that same period of time the emitter makes a sharp voltage pulse from a normal zero potential to about + 12 volts or more, then to about minus 12 volts or more, essentially completing a full and nearly perfect sine wave within twenty nanoseconds. At the end of the 20 nanoseconds there is some limited but distorted oscillation of the voltage about the zero reference line. A typical output wave form is shown at numeral 38 in Fig. 1. In general, there is thus disclosed an electrical circuit for generating intermittent high frequency pulses of extremely brief duration. The transistor having a base, a collector, and an emitter, has a resistance R in a forward conduction path from its collector through one of its base and emitter. The inductor has an inductance value L. The inductor is connected in series with the forward conduction path of the transistor. Voltage means are provided for placing the forward conduction path of the transistor near its breakdown condition. Triggering means is also provided

for actuating the transistor so that its forward conduction path breaks down at least momentarily and conducts in the avalanche mode. Circuit means associated with the voltage means is also provided for supplying a large current to the forward conduction path of the transistor during its breakdown mode, whereby the inductor produces essentially a single sine wave cycle of voltage representing an oscillation frequency determined essentially by the ratio of L to R.

In the particular embodiment here described the forward conduction path of the transistor is the collector-emitter path. It is also possible, by appropriate rearrangement of the circuit, to utilize instead the collector-base forward conduction path of the transistor.

ALTERNATE FORMS (Figs. 2-5) Fig. 2 is a schematic circuit diagram of an alternate form of the transmitter driver utilizing the collector-base forward conduction path of the transistor. The circuit values R15, C8, TR3 , LI, C9, R16, and antenna 56 are also the same as before. A resistor R17 is connected in series between the other end of LI and ground. Bias resistor R16 is connected between the emitter of TR3 and ground. Antenna 56 is connected to the juncture of inductor LI and resistor R17, and the trigger pulses 41 are negative-going rather than positive-going.

Fig. 3 is a schematic circuit diagram of another alternate form of the pulse generator and transmitter, which may in fact be preferable to the circuit of Fig. 1. The voltage bias circuit 52 is the same as before. The triggering pulses 41 are negative-going and applied

through C9 to the emitter of TR3; and inductor LI and antenna 56 are connected to the base of TR3.

The function of resistor R17 can be very important. The effective frequency of the single sine wave cycle produced by the circuit is determined by the ratio of L to R, where R includes not only the resistance of the transistor during forward conductance but also the resistance value of R17. The value selected for R17 will usually be small, such as about ten ohms. A small change in the value of R17 will create a corresponding change in the period of the single cycle of the generated sine wave, which in layman's terms could be described as a change in the length or duration of the sine wave cycle and hence of its apparent frequency. The resistor R17 may if desired be made manually adjustable, or may be omitted. The resistor R17 may also be incorporated into the circuit of Fig. 1 for the same purpose as in Figs. 2 and 3. For the grounded base configuration of Figs. 2 and

3 the one cycle has plus or minus voltage of more than 40 or 50 volts.

Fig. 4 is a schematic diagram of another alternate form of the invention. The trigger pulses 41 are positive-going. The circuit is the same as in Fig. 1, except that a capacitor CIO is connected in parallel with the inductor LI. The addition of the capacitor CIO will cause the transmitted pulse to extend for a longer time, producing two or more sine waves of rapidly diminishing amplitude, as shown at 45. The parallel tuned circuit ClOLl stores the radio frequency (RF) energy. The charge energy of capacitor C18 is dumped into CIO in one nano-second or less. No charge line should be used in this embodiment.

In Fig. 5 the numeral 58 indicates a schematic representation of a coaxial cable. As previously described, the coaxial cable preferably has a length (in terms of transit time) equal to one-fourth of the wave length of the transmitted wave at the desired frequency.

Also shown in Fig. 5 is a transistor TR3 having its collector connected through a resistor R18 to a positive voltage source +V. The delay line 58 used as a charge storage device has one of its terminals connected to the collector of TR3 while its other terminal is grounded. The emitter of TR3 is connected through a resistor R19 to the anode terminal of a light emitting diode LED, whose cathode is grounded. The trigger pulses 37 are applied to the base of TR3 through capacitor C9 and across a bias resistor R20. An optical fiber 95 has one end exposed to the electromagnetic light waves generated by the LED.

In operation, in the circuit of Fig. 5 the voltage source +V normally holds the transistor near the breakdown condition for its collector-emitter forward conduction path. Charge line 58 is fully charged by current from +V. As each intermittent triggering pulse 37 is applied to the base of TR3, the transistor temporarily breaks down, and an avalanche of current flows from charge line 58 through the transistor. A voltage pulse applied through R19 to the LED causes electromagnetic light waves to be emitted from it, which in turn are transmitted down the length of the optical fiber 95, or into free space.

After each pulse generated by the circuit of Fig. 5, the charge line 58 is then recharged. As in the preferred embodiment of Fig. 1, the resistance of resistor R18 is such as to prevent too rapid recharging, so that the transistor will not be

destroyed by overly frequent energy pulses. The use of a resistor R15 or R18 is the preferred embodiment for this purpose. Any means to restrict the recharging of the charging capacitor C8 or C18 while the transistor TR3 is still in the avalanche mode, or to make the charging circuit inoperable, may be used. For example, in a multiplex transmission system a single charging circuit may be switched among different pulse generators.

Application to PPM transmission of audio signals

According to the present invention, message information in electronic form is transmitted as a series of discrete, widely separated high frequency electromagnetic radio frequency pulses. Each pulse consists essentially of a single cycle at the transmitted signal frequency, but whose time position represents the intelligence being transmitted.

An information signal typically of analog form is sampled upon each occurrence of a periodic reference signal. In response to each sampling of the information signal, an output pulse is generated that is varied in time relative to the associated reference signal by an amount proportional to the then existing amplitude of the information signal. A series of output pulses thus produced then represents the information signal in a configuration known as pulse position modulation (PPM) , sometimes also known as pulse time modulation (PTM) . In accordance with the invention each output pulse that represents the information signal is applied to a driver circuit of the type shown in the drawings, that in turn produces an energy pulse of brief, essentially constant duration but whose time position corresponds to that of the output pulse that initiated it. A high-frequency

transmitted signal is thus generated that consists of a series of discrete, widely separated high frequency pulses.

Many engineering factors are important, including among others initial cost, reliability, and useful life of equipment; operating power required; fidelity of transmission; and susceptibility of the transmission to noise or interference. Another factor that enters into present day situations is the need for government approval for radio transmitting equipment. The United States government has set a standard for average transmitted power above which a separate government license must be obtained for each installation. It is advantageous in many situations to be able to communicate by electronic means without the need for such government approval.

This type of PPM system therefore requires only a very low average transmitted power. The operating power required in the present system is therefore also minimized, and the susceptibility to interference signals is also reduced. The circuits disclosed in the present application may be advantageously used for a cordless telephone, where transmission distances are not great, the low average power requirement is a great economic advantage, and the inherent resistance of the specially coded, intermittent PPM pulses to eavesdropping is of great importance.

It should be noted that the PPM pulses may alternatively be configured to represent digital coded data as well as analog data.

WHAT WE CLAIM IS: